Top Design Engineer Jobs in Bangalore

Designs, develops, tests, deploys, and troubleshoots cloud application modules and features. The role involves automating testing, applying security policies, supporting deployment environments, analyzing technical problems, and collaborating with project managers, developers, and technical contributors. Candidates should have programming experience in Python, Java, Golang, or JavaScript, familiarity with cloud-native development and managed services, and knowledge of DevOps practices including CI/CD and Kubernetes orchestration.

Design and integrate complex analog and custom digital blocks for advanced DRAM (HBM) products, perform parasitic modeling, validation, and tape-out revisions; oversee layout (floor-planning, placement, routing), run simulations with industry simulators, collaborate across functions for manufacturability, mentor junior designers, and apply AI/agentic AI tools (e.g., Claude) to optimize PPA and delivery.

Design and validate advanced analog mixed-signal circuits for HBM products including amplifiers, comparators, bandgap refs, LDOs, charge pumps, oscillators, DLLs and IOs (DDR/LPDDR). Drive layout, EM/IR optimization, parasitic modeling, tape-out revisions, reliability verification, and cross-functional integration with power delivery, process, test, and product teams. Use industry simulators and AI tools to improve PPA and delivery.

Designs and develops advanced semiconductor package layouts, including 2.5D/3D IC, chiplet, FCBGA, SiP, and multi-chip packages. Manages CAD databases, schematics, netlists, footprints, substrate and RDL layouts, routing, power structures, and manufacturing outputs. Ensures DFM, DFA, DRC, LVS, foundry, OSAT, and manufacturing compliance while collaborating with signal integrity, power integrity, thermal, reliability, and DFT teams throughout design reviews and ECO cycles.

Develop and integrate RTL logic designs into complex SoC architectures. Perform simulation, quality checks, and corrective actions to meet power, performance, timing, and area targets. Collaborate with IP providers to validate SoC-level integrations, review verification plans, resolve failing RTL tests, and optimize designs using advanced methodologies and tools.

Designs and optimizes high-performance analog and mixed-signal circuits for SerDes, memory interfaces, and advanced process nodes. Responsibilities include circuit simulation, parameter extraction, test planning, post-layout validation, post-silicon debugging, and optimization for power, area, timing, yield, and reliability. The role collaborates with architecture and layout teams, improves design methodologies, and uses industry-standard EDA tools.

Design and deliver full-custom IC layouts for high-performance digital memory circuits in advanced CMOS nodes (3nm/5nm/7nm). Implement memory mask layouts, apply best layout methodologies, perform floorplanning, block routing, macro assembly, and run top-level verification including EM/IR and layout-dependent effect checks.

Designs and verifies digital integrated circuits for advanced semiconductor products, including DSP processors, MMUs, multicore shared-memory and cache systems. Responsibilities include architecture analysis, specification development, design reviews, behavioral modeling, layout supervision, prototype characterization, test specification development, documentation, and coordination with system, test, and product engineering teams. The role includes structured training and exposure to design verification and analog design.

Designs and verifies digital ICs for semiconductor products, including processors, MMUs, multicore systems, memory, and cache architectures. Responsibilities include defining specifications, analyzing architecture trade-offs, participating in design reviews, supervising layouts, developing behavioral models, characterizing prototypes, and coordinating product releases. The role includes structured training through TI’s Career Accelerator Program and exposure to design verification and analog design.

Designs, develops, and validates mechanical components, assemblies, and electronic packaging for industrial automation products. Creates 3D CAD models, drawings, and product documentation; performs tolerance analysis and applies GD&T, DFM/A, and DFMEA. Collaborates with electrical, manufacturing, quality, and product teams on verification, prototyping, compliance testing, PPAP, tooling, supplier interactions, and manufacturing readiness. Manages PLM/PDM data and contributes to design reviews and engineering process improvements.

Designs and develops ASIC memory subsystem and network interconnect IP, owning microarchitecture, RTL implementation, verification, synthesis, timing, physical design coordination, prototyping, and post-silicon debug. Collaborates with architects, verification, FPGA, software, VLSI, and backend teams to deliver performance-, power-, and area-optimized designs.

Own physical design methodology and top-level timing closure for GPU and SoC designs. Responsibilities include floorplanning, placement, clock-tree synthesis, post-route optimization, static timing analysis, EMIR analysis, ECO and DRC closure. Build and improve EDA tool flows, automate processes with Python and Tcl, troubleshoot design and tool issues, optimize PPA and turnaround time, and collaborate with design teams and EDA vendors across tapeouts.

Translates logical circuit designs into physical layouts, optimizing area, power, and timing. Performs placement, routing, clock tree synthesis, timing closure, design rule checks, and manufacturability analysis. Collaborates with timing, verification, and cross-functional teams to resolve issues before tape-out. Leads design reviews, supports project milestones, mentors junior engineers, manages team decisions, and drives improvements to physical design methodologies and workflows.

Design electrical PLC control panels: create electrical diagrams, panel layouts, and BOMs; provide engineering support to customers and manufacturing; manage project schedules, deadlines, escalations, external design business, and team training.

Own physical design blocks from synthesis through tapeout and sign-off, including floorplanning, place-and-route, clocking, timing, power, and optimization. Collaborate with architecture, front-end, foundry, IP, and design-services teams to deliver high-performance CPU, SoC, and AI chip designs. Improve area, power, and performance through implementation-flow tuning and RTL experiments while supporting advanced-node, high-quality silicon development.

Lead mechanical design for battery packs, charging stations, connectors, and vehicle integration kits. Own designs from concept through production, ensuring structural, thermal, sealing, serviceability, manufacturability, and cost performance. Review calculations and tolerance analyses, develop validation plans, conduct root-cause investigations, collaborate with manufacturers and assembly teams, and document development using FMEA, DFX, DVP, and inspection plans.

Architects and designs high-speed analog and mixed-signal IC blocks for automotive Ethernet and SerDes products. Responsibilities include specifications, circuit design, modeling, verification planning, layout guidance, SoC integration, mixed-signal simulation, silicon validation, production test support, and design methodology improvements. The role requires expertise in Class-AB line drivers, receiver chains, or PLLs, successful tapeout experience, analog modeling, lab characterization, and collaboration with test and layout teams.

Design and develop low-power, high-speed analog and mixed-signal ICs, particularly PLLs, for automotive Ethernet and SerDes applications. Responsibilities include architecture, specifications, verification planning, MATLAB and Verilog-A modeling, chip integration, mixed-signal simulation, layout supervision, silicon validation, characterization, production test support, and design methodology improvements.

Provides mechanical design support for commercial HVAC and refrigeration product development. Designs sheet metal and tubing parts, prepares layouts, concepts, sketches, drawings, bills of materials, and engineering change notices. Supports production parts, follows drafting standards, collaborates cross-functionally, and manages design and drawing releases. Requires knowledge of casting, machining, GD&T, refrigeration components, manufacturing processes, and engineering documentation.

Design and develop memory subsystem components for GPUs and SoCs, including micro-architecture, RTL implementation, verification, synthesis, timing, physical design coordination, prototyping, and post-silicon debug. Collaborate with architects, verification, FPGA, software, timing, VLSI, and backend teams to deliver high-performance, power- and area-efficient designs.

Develops physical designs for next-generation AI semiconductors, delivering signoff-quality chip layouts at advanced process nodes. Responsibilities include floorplanning, synthesis, placement and routing, clock-tree synthesis, timing analysis, logical equivalence, physical verification, flow enhancement, scripting, debugging, and PPA optimization. The engineer collaborates with RTL, verification, DFT, architecture, packaging, product engineering, foundries, and external support teams.

Designs high-speed mixed-signal communication circuits and digital circuits interfacing with analog circuitry. Responsibilities include RTL coding, simulation, synthesis, timing closure, verification, evaluation, and debugging at circuit and behavioral levels. The engineer also develops test methods, specifications, application materials, data sheets, and demo boards; solves complex technical problems; and collaborates with analog and digital design teams.

Performs semiconductor physical design and integration at block, subsystem, sub-chip, and full-chip levels. Responsibilities include floorplanning, synthesis, placement, clock-tree synthesis, routing, static timing, physical verification, formal equivalency, power optimization, IR-drop, and electromigration analysis. The engineer may develop and automate physical design flows, evaluate technology and IP options, support vendor selection, communicate program risks, and contribute to complex ASIC tapeouts.

Designs analog ICs, chip subsections, and IPs from architecture through manufacturing release. Responsibilities include circuit design, simulations, silicon evaluation, verification, layout coordination, parasitic analysis, and production transfer. The role collaborates with verification, validation, test, product engineering, customers, and cross-functional teams to deliver high-quality custom semiconductor designs on schedule.

Leads end-to-end hardware development for next-generation routing and switching platforms, from architecture and PCB design through production. Responsibilities include schematic, BOM, placement, routing, Gerber release, bring-up, debugging, validation, fault analysis, compliance testing, and product sustaining. The role leads technical deliverables, collaborates with cross-functional teams and suppliers, designs with CPLDs and FPGAs, and addresses high-speed CPU, memory, and networking interfaces while considering signal integrity, thermal, power, mechanical, manufacturing, and cost requirements.