Top Design Engineer Jobs in Bangalore

Lead ESD architecture and protection strategies, advanced circuit design, silicon-level debug, and cross-functional mentoring in high-speed I/O systems.

The Staff ASIC Physical Design Engineer will develop block-level physical design for ASICs, focusing on low power implementation, timing closure, and physical verification. Required skills include expertise with Cadence tools and advanced process technologies, alongside strong analytical and interpersonal abilities.

Seeking skilled silicon physical design engineers to develop AI superchips, utilizing advanced technologies, enhancing design flows, and problem-solving collaboratively.

The DFT Design Engineer will design custom digital DFT circuits, define testability features, and perform simulations, collaborating with other designers and product engineering.

Design and develop custom digital DFT circuits, implement testability features, collaborate with engineers, and perform circuit simulations to enhance memory testability.

The lead electro-mechanical engineer will design and develop components, manage requirements, lead issue resolution in production, and collaborate across technical teams.

As a Silicon Logical Design Engineer, you will produce high-quality microarchitecture and RTL, collaborate across teams, and help ensure successful chip delivery.

Design and implement complex analog circuits for advanced DRAM products, oversee layout processes, validate designs, and mentor junior engineers. Collaborate across multiple teams to enhance product manufacturability using AI tools.

Collaborate with product designers to convert Figma mockups into functional prototypes using modern front-end technologies. Ensure high-quality visual fidelity and technical feasibility through iterative cycles and stakeholder feedback.

The Senior R&D Hardware Design Engineer will lead complex hardware designs, focusing on high-speed digital systems, mentoring junior engineers and collaborating across teams for production-ready designs.

As an Analog Mask Design Engineer, you will execute IC layout for CMOS integrated circuits, perform physical verification, and lead design efforts for high-performance analog blocks while collaborating effectively with teams.

Design and implement micro-architectures in RTL for memory subsystems, verify functionality, and collaborate with cross-functional teams for debugging and synthesis.

The role involves designing evaluation boards for Nvidia products, managing design execution, collaborating on specifications, and hands-on testing.

Perform full-custom IC layout for high-performance digital memory circuits in advanced CMOS nodes (3nm/5nm/7nm). Deliver memory IP layouts, apply best layout methodologies, perform floorplanning, routing and macro assembly, and ensure top-level verification for EM/IR and layout-dependent effects (LOD, dummification, fills). Follow company IC layout procedures.

The Analog Flash Design Engineer will design and verify analog/mixed-signal circuits for embedded Flash Memory, collaborating with cross-functional teams, optimizing performance, and contributing to innovation.

The Physical Design Engineer is responsible for planning and validating power delivery networks for SoCs, collaborating with teams on power requirements, and ensuring robust design solutions with design rule checks.

Design and implement advanced Digital IO Controllers for data center and AI chips, focusing on PCIe/CXL/UCIe systems, while mentoring junior engineers and collaborating with cross-functional teams.

Design I/O circuits, perform PVT simulations, reliability and Monte Carlo analysis, and collaborate with teams for IP integration in SoC.

The Mechanical Design Engineer will perform engineering analysis, design mechanical layouts, coordinate component procurement, conduct tests, and troubleshoot mechanical issues under general supervision.

Lead the design and development of advanced hardware systems focusing on circuit design, PCB layout, and compliance testing for biomedical applications. Responsibilities include schematic capture, validation testing, thermal analysis, and collaboration with compliance teams.

The role involves developing and optimizing mixed-signal and high-speed IPs, RTL coding, simulation, and IP integration for full-chip designs.

Develop and optimize mixed-signal and high-speed IPs, including RTL coding and simulation for full-chip designs, while collaborating across teams.

The engineer will research and develop power electronics designs, focusing on advanced topologies and analog circuits, while working on prototypes and collaborating with PCB designers.

The Principal Design Engineer is responsible for leading design verification projects, conducting functional verification, and developing verification environments, focusing on UVM and System Verilog.

Lead block-level designs and verification of complex digital systems while mentoring junior engineers and optimizing performance and power efficiency.