Top Design Engineer Jobs in Bangalore

Design and architect high-performance networking ASIC blocks, develop microarchitecture and logic for throughput and power efficiency, collaborate with verification teams on test plans and debugging, and work with physical design teams on timing constraints, violation analysis, and fixes. The role is onsite in Bangalore and requires strong analytical, communication, collaboration, and problem-solving skills.

Design and deliver RTL for complex DRAM, memory, and mixed-signal digital blocks. Own front-end ASIC development from architecture through RTL implementation, verification support, synthesis, timing closure, and implementation handoff. Define timing and power constraints, analyze performance and PPA, collaborate across architecture, verification, circuit, and physical design teams, improve RTL-to-GDS methodologies, and mentor peers. The role requires advanced Verilog/SystemVerilog expertise and extensive ASIC or SoC design experience.

Leads architecture, design, verification, integration, silicon validation, and production qualification of complex analog and mixed-signal circuits for advanced DRAM products. Drives IP development from concept through tape-out and manufacturing, optimizing power, performance, area, reliability, yield, and manufacturability. Provides technical leadership, mentors engineers, advances reusable IP and patents, and collaborates across product, process, test, assembly, and manufacturing teams.

Designs and develops board-mount and front-end power systems for HPE networking hardware. Responsibilities include defining requirements, selecting components, circuit simulation, schematic capture, PCB coordination, prototype testing, system integration, manufacturing support, test planning, technical reviews, mentoring engineers, technology development, and patent participation.

Design and develop mechanical and electrical solutions for automated and special test equipment used in aerospace testing. Responsibilities include rack, wiring, harness, schematic, and layout design; CAD and PLM documentation; connector and measurement equipment selection; qualification and verification testing; troubleshooting; obsolescence management; failure investigations; and test-plan development. The engineer will coordinate with technical leads, customers, and global teams while managing test-program scope, cost, schedules, integration, documentation, and deployment.

The posting provides company and culture information but does not specify the Design Engineer’s responsibilities, qualifications, technologies, location, travel, or project details. The role title indicates a drainage-focused engineering position within Egis’s architecture, consulting, and construction engineering organization.

Design and own transistor-level analog blocks (bandgap references, op-amps, comparators, level shifters), define architectures to meet specs, perform schematic capture, circuit simulation and Monte Carlo analysis, guide layout for performance, mentor junior engineers, and support silicon validation and I/O/ESD design for PMIC and DC-DC products.

Designs and implements electrical systems for airport, infrastructure, and building projects. Prepares single-line diagrams, panel schedules, equipment selections, electrical calculations, lighting analyses, and design documentation. Reviews shop drawings, ensures compliance with codes and standards, and collaborates with multidisciplinary teams, clients, and project stakeholders. The role also requires experience with fire alarm and life safety systems, Revit MEP, AutoCAD, and project coordination.

Design and lead development of analog power-management ICs, including hotswap controllers, eFuses, IPDs, PMICs, converters, and drivers. Own transistor-level circuit design from concept through production, including simulation, verification, layout review, characterization, testability, and yield targets. Mentor engineers, drive design best practices, and collaborate on complex semiconductor products using advanced CAD tools and BCD processes.

Designs, develops, simulates, verifies, and optimizes analog and mixed-signal circuits, including GPIO, PLLs, LDOs, and ADCs, for advanced semiconductor process nodes. Responsibilities include floor planning, parameter extraction, test planning, performance analysis, issue resolution, and power, performance, area, timing, and yield optimization. The role collaborates with architecture and layout teams to deliver robust, high-quality semiconductor IP.

Designs RTL for BOOT and power-management subsystems in automotive and client chips. Responsibilities include architectural trade-offs, micro-architecture development, RTL implementation, verification leadership, timing closure, physical-design collaboration, and silicon validation. The role requires strong digital design and verification fundamentals, subsystem design experience, analytical problem-solving, and collaboration across global engineering teams.

Designs and verifies high-speed mixed-signal communication chips and digital circuits interfacing with analog circuitry. Responsibilities include RTL coding, simulation, synthesis, timing closure, verification, debugging, test-method development, specifications, application materials, data sheets, and demo boards. Collaborates with analog and digital engineering teams to solve complex problems, present technical information, and deliver multiple projects on schedule.

Designs analog integrated circuits for high-voltage and high-current automotive and industrial power-management products. Responsibilities include defining circuit architectures, implementing and verifying circuit blocks, collaborating on floorplanning and layout, creating design documentation, supporting silicon validation and debug, and contributing to full-chip verification and productization. The role requires strong electrical engineering fundamentals, analog circuit design experience, and collaboration across system, process, packaging, EDA, test, and product engineering teams.

Develop modular LabVIEW software for industrial products, user interfaces, device communications, automated test equipment, end-of-line test benches, and hardware-in-the-loop systems. Integrate applications with NI DAQ devices, PLCs, HMIs, vision systems, testers, and laboratory instruments using industrial communication protocols. Responsibilities include coding, testing, debugging, documentation, and participation across the software development lifecycle.

Develop digital intellectual property for advanced microcontrollers, microprocessors, and switches. The role focuses on networking switch and network controller IP cores supporting current Time-Sensitive Networking standards, contributing to chips used in automotive, smart-home, and industrial applications.

Lead the design and development of complex highway projects, ensuring safety, efficiency, and sustainability while managing timelines, budgets, and resources.

Lead the design and development of SSD hardware, ensuring compliance with standards, collaborating with cross-functional teams, and automating validation tests.

Design and develop RTL IP blocks for Intel SoC systems, including secure access-control logic, protocol bridges, parity/ECC, RAS handling, telemetry, debug, and firmware-visible status mechanisms. Define IP architecture and microarchitecture, optimize designs for power, performance, area, and timing, and support simulation, verification, integration, post-silicon debug, and customer handoff. Collaborate with architecture, validation, firmware, and post-silicon teams to deliver reliable, diagnosable IP.

Leads system-level mechanical design for high-performance electronic systems from concept through production. Responsibilities include architecture, requirements, design for manufacturability, thermal and structural analysis, chassis and PCB assembly integration, prototype support, drawings, bills of materials, engineering change orders, supplier collaboration, and mentoring engineers.

Designs and validates mechanical and electronic packaging for indoor and outdoor telecommunications equipment. Responsibilities include DFM, electro-mechanical integration, thermal and structural analysis, testing, design iterations, engineering changes, BOM structuring, and full project lifecycle leadership. The role also requires collaboration, mentoring, technical documentation, and adherence to GD&T, drawing, and assembly tolerance standards.

Design and develop plastic components for two-wheeler electric vehicles, including body panels, trims, and battery enclosures. Create 2D and 3D models using Siemens NX and Teamcenter, apply DFM/DFA and GD&T principles, select polymers, collaborate on CAE and FEA analysis, coordinate with suppliers and toolmakers, and support prototyping, testing, validation, documentation, and continuous design improvement.

Design, develop, validate, and improve mechanical components and electronic enclosures for high-power outdoor energy products. Responsibilities include design for manufacturability, PCB integration, production documentation, engineering analysis, FAI review, testing, troubleshooting, and cross-functional collaboration through product launch.

Designs and develops advanced semiconductor package layouts, including 2.5D/3D IC, chiplet, FCBGA, SiP, and multi-chip packages. Manages CAD databases, schematics, netlists, footprints, substrate and RDL layouts, routing, power structures, and manufacturing outputs. Ensures DFM, DFA, DRC, LVS, foundry, OSAT, and manufacturing compliance while collaborating with signal integrity, power integrity, thermal, reliability, and DFT teams throughout design reviews and ECO cycles.

Lead functional verification for serial bus multiprotocol PHY IP, including developing verification environments, test plans, methodologies, assertions, coverage, and constrained-random tests. Collaborate with RTL, physical design, analog, and modeling teams; debug RTL and gate-level simulations; support customer issues; and contribute to verification strategy and architecture. Experience with SerDes, USB/DPHY, or UCIe verification is expected, with power-aware, formal, analog, automotive, or emulation experience beneficial.

Lead physical design implementation and integration from block to full-chip level, covering floorplanning, synthesis, placement, CTS, routing, static timing, physical verification, formal equivalence, power/IR-drop and EM analysis. Drive flow development/automation, evaluate technology/IP/vendors, support tapeouts in leading-edge nodes, report status/risks, and collaborate with program teams. Occasional travel may be required.