Top Design Engineer Jobs in Bangalore

The Staff ASIC Physical Design Engineer will develop block-level physical design for ASICs, focusing on low power implementation, timing closure, and physical verification. Required skills include expertise with Cadence tools and advanced process technologies, alongside strong analytical and interpersonal abilities.

Seeking skilled silicon physical design engineers to develop AI superchips, utilizing advanced technologies, enhancing design flows, and problem-solving collaboratively.

The DFT Design Engineer will design custom digital DFT circuits, define testability features, and perform simulations, collaborating with other designers and product engineering.

Design and develop custom digital DFT circuits, implement testability features, collaborate with engineers, and perform circuit simulations to enhance memory testability.

As a Silicon Logical Design Engineer, you will produce high-quality microarchitecture and RTL, collaborate across teams, and help ensure successful chip delivery.

Collaborate with product designers to convert Figma mockups into functional prototypes using modern front-end technologies. Ensure high-quality visual fidelity and technical feasibility through iterative cycles and stakeholder feedback.

The Staff Engineer will focus on RTL design, SoC integration, and collaborate with cross-functional teams while leveraging AI skills.

The lead electro-mechanical engineer will design and develop components, manage requirements, lead issue resolution in production, and collaborate across technical teams.

The Principal Design Engineer is responsible for leading design verification projects, conducting functional verification, and developing verification environments, focusing on UVM and System Verilog.

Design and develop high-speed memory PHYs, overseeing sub-systems and mentoring teams while ensuring quality and schedule adherence.

The candidate will lead major blocks of Memory PHY layout design, perform hands-on design for critical analog and high-speed layout, and coordinate with teams for layout reviews.

As a Senior Engineer in ASIC Design, you'll develop and document ASIC IP blocks, optimize design methodologies, and collaborate on cutting-edge 5G and 6G technologies.

The role involves leading mechanical design activities for aeroderivative gas turbines, including 3D modeling, FEM analysis, and cross-functional coordination.

The role involves executing end-to-end physical design for ASICs, improving methodologies, scripting automation in Tcl/Python, and ensuring successful integration and tape-out readiness.

The role involves designing and architecting high-performance networking ASICs, performing micro-architecture, and collaborating with verification and physical design teams.

As a Digital Libraries Design Engineer, you'll characterize CMOS cell libraries for high-speed, low-power applications, involving modeling, validation, and quality assurance.

The role involves RTL design and support for DDR Memory Controller IP, including design updates, customer support, and adherence to design guidelines.

The Design Engineer plans and coordinates manufacturing processes, improves methods, troubleshoots issues, and ensures production efficiency while adhering to quality and safety standards.

Perform full-custom IC layout for high-performance digital memory circuits in advanced CMOS nodes (3nm/5nm/7nm). Deliver memory IP layouts, apply best layout methodologies, perform floorplanning, routing and macro assembly, and ensure top-level verification for EM/IR and layout-dependent effects (LOD, dummification, fills). Follow company IC layout procedures.

Design and own key analog blocks, ensure performance specifications are met, mentor junior engineers, and manage the design process for analog circuits.

As an Analog IC Design Engineer at Texas Instruments, you'll design and innovate analog circuits, lead projects, collaborate with teams, and ensure high-quality electronic component production.

The role involves driving digital design for complex mixed-signal products, managing design activities, collaborating with cross-functional teams, and engaging in customer discussions to ensure successful product development.

The Digital Physical Design Engineer manages the entire flow from RTL to GDSII, ensuring design integrity and effective clock tree methodologies, while coordinating with various teams to achieve project goals.

The role involves designing, guiding, and evaluating analog circuits, collaborating with various teams, and managing product transitions, focusing on customer interactions and technical excellence.

Design state-of-the-art NVM memories and peripheral analog IPs, collaborate with cross-functional teams, ensure design robustness through verification and simulations.