Top Design Engineer Jobs in Bangalore

Lead and execute functional verification for complex VLSI designs using SystemVerilog and UVM. Plan environments, generate test plans, develop verification environments, drive projects from concept to verification closure, and mentor teams. Prior memory IP (DDR/HBM/GDDR) verification experience is a plus.

Lead design verification efforts using SystemVerilog and UVM: plan verification environments and test plans, develop functional verification environments, verify complex designs, and drive projects to verification closure. Memory IP (DDR/HBM/GDDR) experience is a plus.

The Lead Design Engineer will code in RTL, create datapath designs, and manage complex FIFO design while collaborating with analog design teams.

Design and own RTL development for an AI-enabled RISC-V CPU core, including microarchitecture, vector/matrix engines, performance/power/area optimization, and verification support. Collaborate with cross-functional teams for timing, reliability, testability, and SoC integration.

Design and architect high-performance ASIC blocks for advanced networking systems. Perform micro-architecture and RTL implementation, collaborate on verification and physical design, debug timing and functional issues, and optimize for throughput and power.

The role involves designing and architecting high-performance networking ASICs, performing micro-architecture, and collaborating with verification and physical design teams.

The Senior Hardware Design Engineer will lead complex hardware designs, mentor engineers, and make key technical decisions in networking systems.

Design and implement block-level verification environments using SystemVerilog and UVM. Develop and run verification suites with front-end simulators (VCS/Xcelium), analyze code and functional coverage, perform gate-level simulation, debug ASIC issues with designers, and build scripts to improve verification infrastructure.

Design and architect high-performance networking ASIC blocks, perform micro-architecture and RTL logic design, collaborate with verification to develop test plans and debug, and work with physical design to create timing constraints, analyze violations, and implement timing fixes.

Define and micro-architect high-performance blocks for next-generation networking ASICs. Perform RTL micro-architecture and Verilog coding, optimize throughput and power, partner with verification for test plans and debugging, and collaborate with physical design on timing constraints and closure.

Designs and develops ASICs using RTL methodologies as part of an engineering services team. The posting provides limited details beyond the senior-level title, full-time status, and Noida, India location.

Performs CPU physical design implementation from RTL to GDSII, including synthesis, floorplanning, placement, routing, clock tree synthesis, timing closure, power optimization, reliability analysis, and signoff verification. Collaborates with architecture, logic, circuit, automation, and EDA vendor teams to improve CPU performance, power, area, design methodologies, and flow automation for high-speed, low-power semiconductor products.

Leads digital architecture, RTL design, low-power design, synthesis, timing analysis, and tool-flow execution for power-management ICs. Drives designs from architecture through RTL, verification, implementation, system-level bring-up, and post-silicon validation. Collaborates with analog, digital, verification, architecture, and project-management teams globally while improving design processes, reuse, and quality. Applies expertise in ASIC and mixed-signal development, digital control peripherals, power-converter architectures, and power-performance-area trade-offs.

Leads digital architecture, RTL design, low-power implementation, synthesis, timing analysis, and verification support for power management ASICs and mixed-signal ICs. Drives designs from architecture through RTL, pre-silicon bring-up, implementation, and post-silicon validation. Collaborates with analog, digital verification, architects, and project teams across global locations while improving design tools, flows, reuse, and quality processes.

Design and deliver complex analog and mixed-signal power-management IPs, including regulators, converters, gate drivers, and control loops. Lead analog blocks from definition through tape-out, perform design and simulation, guide physical designers, collaborate with validation and test teams, debug silicon issues, and ensure technical execution aligns with full-chip schedules.

Lead development of complex analog IPs and power management ICs from architecture and circuit design through verification, layout, silicon evaluation, and manufacturing release. Provide technical leadership, resolve complex analog issues, guide physical and verification teams, manage schedules and resources, and collaborate with systems, applications, marketing, validation, product engineering, and test teams.

Leads development and manufacturing release of complex analog power-management ICs, including DC-DC PMICs, multiphase controllers, gate drivers, converters, and mixed-signal designs. Owns architecture, circuit design, verification, layout oversight, silicon evaluation, debugging, and production transfer. Collaborates with systems, validation, product, test, marketing, and physical design teams while managing schedules, resources, technical outcomes, and engineering talent.

Leads digital architecture, RTL implementation, low-power design, synthesis, timing analysis, and verification flows for power management ICs. Collaborates globally with analog, digital, verification, and project teams; supports pre-silicon platforms, post-silicon validation, IP quality control, and system-level feature bring-up. The role requires expertise in ASIC and mixed-signal development, power converter architectures, digital control peripherals, and power-performance-area trade-offs.

Design and deliver analog power-management IP blocks from definition through tape-out. Responsibilities include CMOS analog design, block-level simulation, technical reviews, layout guidance, silicon validation, debugging, and collaboration with product, test, validation, and physical design teams. The role covers regulators, converters, control loops, mixed-signal designs, gate drivers, and other power-management circuits while coordinating execution with full-chip schedules.

Leads analog IP development for power management ICs from architecture and circuit design through verification, tapeout, silicon evaluation, and manufacturing release. Provides technical leadership, resolves complex analog issues, guides physical design and layout, coordinates cross-functional teams, manages schedules and resources, and supports product definition, validation, testing, and production transfer.

Leads analog IP development for power management ICs from definition through tape-out, silicon evaluation, validation, and production transfer. Guides physical design and verification teams, collaborates globally, resolves complex silicon issues, and owns technical outcomes across analog and mixed-signal designs. The role also requires planning schedules and resources, tracking execution, and mentoring or attracting engineering talent.

Lead the design and development of Power Management products focusing on digital design architecture, RTL implementation, and collaboration with cross-functional teams for efficient integration.

The Senior Principal Digital Design Engineer will lead power management product development, collaborating on digital design architecture, RTL implementation, and post-silicon validation, while ensuring project goals are met.

Designs and implements electrical systems for airport, infrastructure, and building projects. Prepares single-line diagrams, panel schedules, equipment selections, electrical calculations, lighting analyses, and design documentation. Reviews shop drawings, ensures compliance with codes and standards, and collaborates with multidisciplinary teams, clients, and project stakeholders. The role also requires experience with fire alarm and life safety systems, Revit MEP, AutoCAD, and project coordination.

Design building mechanical systems across HVAC, plumbing, fire protection, and sprinkler disciplines. Perform load calculations, system sizing, drawing and shop drawing reviews, code compliance checks, and prepare technical reports, specifications, and construction markups. Coordinate with clients and stakeholders while managing multiple projects. The role supports healthcare, aviation, commercial, data center, retrofit, and upgrade projects.