Top Design Engineer Jobs in Bangalore

The Principal Engineer will define architecture and specifications for complex SoCs, collaborate with teams, review designs, and mentor junior members.

The role involves high-speed IC package development, including C4 and BGA ball maps, netlist validation, and package design documentation. The engineer collaborates with cross-functional teams to optimize package manufacturing and performance.

The Mixed Signal Design Verification Engineer will verify mixed signal components, develop verification plans, and collaborate with teams to enhance product functionality and efficiency.

Develop and maintain a Verification Platform for Design Verification. Collaborate with engineers to create reusable testbench components and educate teams on best practices.

Develop and maintain the Verification Platform, collaborate with engineers to create reusable testbench components, and educate teams on best practices.

This role involves driving verification strategies for SoC designs, developing Test Plans, and collaborating with teams for verification goals in digital design and protocols.

The role focuses on verifying high-performance SoCs and involves leading verification campaigns, utilizing SystemVerilog and automation skills, and mentoring engineers. It includes power-aware and mixed-signal verification, alongside fostering collaboration across teams.

The role involves architecting and implementing simulation test benches, developing test plans, debugging simulation failures, and collaborating with logic designers for verification.

The Senior Principal Engineer will develop and implement methodologies for design automation, integrate AI in design flows, manage tools and infrastructure, and collaborate with cross-functional teams to enhance workflows and productivity.

Define and improve design verification processes, collaborate on test plans, debug simulation failures, and architect testbenches using UVM and C. Verify design correctness for PCIe/CXL subsystems with 18+ years of experience.

Design and develop analog/RF signal chains for automotive battery management systems. Responsibilities include circuit design, simulations, and post-silicon validation.

As a SoC Design Verification Engineer, you will develop verification plans and environments, execute tests, debug issues, and collaborate with design teams to ensure high-quality SoC designs.

Lead quality and reliability target setting and assurance for IGT medical software. Create and oversee quality/reliability plans, validate design inputs, lead FMEA and risk management, ensure V&V evidence, analyze post-market data, guide cross-functional defect investigations, and support regulatory audits as design quality SME.

Lead SoC-level design verification using SystemVerilog/UVM and C/assembly. Build UVM/mixed-signal testbenches, create assertions and coverage-driven tests, run regressions, and generate verification plans using vManager. Collaborate across specification, design, modeling, test, and silicon debug stages to meet project schedules.

Lead physical design closure for subsystems, collaborating with SoC teams, mentoring engineers, and improving design methodology and automation flows.

The Senior Design Verification Engineer will develop verification plans, design digital blocks, support DFT implementation, mentor junior engineers, and engage in IP-level verification tasks while ensuring spec compliance and documentation quality.

The Design Verification Engineer performs functional verification of IP logic, develops verification plans, executes simulations, debugs issues, and maintains verification infrastructure.

As a Mixed Signal Design Verification Engineer, you will verify mixed signal logic components, develop verification plans, analyze simulations, debug issues, and collaborate with design teams.

The role involves designing CMOS analog circuits, performing design reviews, conducting silicon validation, mentoring junior designers, and collaborating with various engineering teams.

The Staff Engineer leads analog and mixed-signal block design, conducts design reviews, mentors junior engineers, and develops methodologies for advanced technology applications.

As a Senior Digital Verification Engineer, lead verification planning for digital and mixed-signal designs, innovate verification environments, and mentor junior engineers.

You will own parts of IP design verification, develop test plans and UVM components, and manage verification strategies and coverage closure.

The Design Verification Engineer will lead the verification of IP designs, execute test plans, and utilize various verification methodologies, focusing on UWB automotive solutions.

The Design Verification Engineer will develop test plans, create verification environments, and evaluate hardware designs using various methodologies focused on automotive connectivity solutions.

The role involves architecting and maintaining the Verification Platform build system, developing tools and build flows, and educating teams on best practices.