Top Design Engineer Jobs in Hyderabad

The Senior Memory Circuit Design Engineer will manage the memory design process, perform simulations, and ensure manufacturability while collaborating across teams.

The role involves block and sub-system design, timing optimization, critical circuit design, mentoring junior engineers, and documenting specifications according to industry standards.

Responsible for logic design of on-chip memory controllers, project management, verification processes, and team mentoring at Micron Technology.

The Senior Physical Design Engineer will manage physical implementation tasks for SoC designs, including floorplanning, timing closure, and signoff activities. They will work on digital blocks and collaborate with various teams to resolve implementation challenges while ensuring design integrity and efficiency.

The Analog Design Engineer will design and optimize circuits for advanced DRAM products, manage layout, perform verification, and contribute to cross-group communications.

The role involves designing and optimizing memory/logic/analog circuits, conducting simulations, and managing layout processes while collaborating with multiple teams to ensure product manufacturability.

The Memory Circuit Design Engineer will design and optimize memory circuits, manage layout processes, verify designs, and collaborate across teams to enhance product manufacturability.

The Memory Circuit Design Engineer will design, validate, and optimize memory circuits, oversee layout processes, and improve design efficiency through collaboration and AI tools.

Design digital IP blocks from microarchitecture to RTL, oversee physical development and verification processes, and mentor teams for DRAM technology innovation.

This role involves block-level and sub-system design, timing optimization, circuit optimization, mentoring juniors, and documenting Micro-Architecture Specifications.

The Memory Circuit Design Engineer will design, layout, and optimize memory circuits, manage layout processes, validate designs, and collaborate across teams to enhance product manufacturability and design quality.

Design digital IP blocks, drive full-chip integration, collaborate on AI-driven design processes, and mentor teams in advanced memory design.

The Design Engineer will assist in developing new product designs, manage the layout process, perform verification, and improve design quality.

Develop new memory products by designing DRAM Memory arrays and circuits, optimizing layouts, and leveraging AI tools for design processes.

The role involves performing analog timing verification, developing testbenches, executing simulations, analyzing waveforms, debugging failures, and improving verification methodologies.

The role involves owning functional verification for designs, developing tests, debugging failures, driving coverage closure, and leading junior engineers in verification methodologies.

The role involves the verification and analysis of memory circuit designs, guiding verification efforts, and developing testing methodologies collaboratively. Candidates should possess skills in circuit analysis, simulation, and scripting.

The Senior Engineer will design and validate on-chip controllers and mixed signal circuitry in NAND FLASH chips, performing RTL design, firmware coding, and full-chip verification.

The Staff Engineer Design will engage in block and sub-system design, timing optimization, mentor junior designers, and collaborate on full-chip floorplanning while using various simulation tools.

The engineer will lead verification efforts, analyze pre-silicon designs, develop test cases for DRAM architectures, and collaborate with international teams while leveraging AI for automation.

The engineer will verify memory circuits using FastSpice tools, analyze designs, develop testbench scenarios, and collaborate with global teams for verification tasks.

The Senior Engineer in Analog Design will develop Analog circuits for Memory products, oversee layout processes, conduct verification, and innovate future memory generations.

The Principal Engineer is responsible for designing, analyzing digital circuits for memory products, managing verification, guiding new hires, and ensuring manufacturability through collaboration.

Responsible for the design, layout, and verification of CMOS electrical test structures, improve automation flows, and mentor junior team members.

The SR Engineer in Design Verification will simulate, analyze, and debug pre-silicon chip designs, develop test cases, and enhance verification methodologies for DRAM and emerging memory architectures.