Top Design Engineer Jobs in Hyderabad

The Senior Physical Design Engineer will manage physical implementation tasks for SoC designs, including floorplanning, timing closure, and signoff activities. They will work on digital blocks and collaborate with various teams to resolve implementation challenges while ensuring design integrity and efficiency.

The Analog Design Engineer will design and optimize circuits for advanced DRAM products, manage layout, perform verification, and contribute to cross-group communications.

The role involves designing and optimizing memory/logic/analog circuits, conducting simulations, and managing layout processes while collaborating with multiple teams to ensure product manufacturability.

The Memory Circuit Design Engineer will design and optimize memory circuits, manage layout processes, verify designs, and collaborate across teams to enhance product manufacturability.

The Memory Circuit Design Engineer will design, validate, and optimize memory circuits, oversee layout processes, and improve design efficiency through collaboration and AI tools.

Design digital IP blocks from microarchitecture to RTL, oversee physical development and verification processes, and mentor teams for DRAM technology innovation.

This role involves block-level and sub-system design, timing optimization, circuit optimization, mentoring juniors, and documenting Micro-Architecture Specifications.

The Memory Circuit Design Engineer will design, layout, and optimize memory circuits, manage layout processes, validate designs, and collaborate across teams to enhance product manufacturability and design quality.

Design digital IP blocks, drive full-chip integration, collaborate on AI-driven design processes, and mentor teams in advanced memory design.

The Design Engineer will assist in developing new product designs, manage the layout process, perform verification, and improve design quality.

Develop new memory products by designing DRAM Memory arrays and circuits, optimizing layouts, and leveraging AI tools for design processes.

The Senior Memory Circuit Design Engineer will manage the memory design process, perform simulations, and ensure manufacturability while collaborating across teams.

The role requires designing and validating analog and mixed-signal circuits for NAND Flash technology, involving extensive lifecycle responsibilities and coordination with multi-functional teams.

The role involves block and sub-system design, timing optimization, critical circuit design, mentoring junior engineers, and documenting specifications according to industry standards.

Responsible for logic design of on-chip memory controllers, project management, verification processes, and team mentoring at Micron Technology.

The role involves designing and optimizing memory circuits, managing layout processes, performing verifications, and collaborating across teams to ensure product manufacturability and innovation.

The role involves RTL verification of memory technologies, guiding verification efforts, developing methodologies, and optimizing using AI tools. Requires collaboration on complex chip design projects.

The Principal DRAM Power Integrity Engineer develops methodologies for EMIR analysis, collaborates across teams, and maintains EMIR analysis tools and dashboards.

Develop and support verification activities for DRAM and emerging memory designs, leveraging automation and AI tools to improve efficiency and coverage. Collaborate with teams to integrate methodologies.

The Engineer - Design Verification role involves developing verification activities for DRAM design, utilizing AI tools, simulating designs, and improving test coverage.

The role involves defining verification scope, developing testbenches, executing tests, debugging RTL, and collaborating on verification methods for DRAM technology.

The role involves auditing verification plans, generating scorecards, collaborating on tracking systems, and engaging in post-silicon activities while leveraging AI tools and automation.

The Senior Engineer will oversee verification activities for DRAM design, leveraging AI tools, developing test cases, and improving debug efficiency in digital/mixed signal verification.

The role involves verification of DRAM Design using AI tools, debugging, simulating, and developing test cases to enhance functional coverage.

The Staff Engineer will oversee verification activities for DRAM design, utilizing AI tools and simulation to enhance efficiency and provide support for design projects.