Top Senior Hardware Engineer Jobs

The Senior Hardware Design Engineer will lead design and validation of power electronic hardware, providing technical leadership and mentoring for projects, circuit design, testing, simulation, and compliance with safety standards.

The role involves supporting the design and manufacture of space flight hardware, developing knowledge of electronic hardware workmanship standards, and conducting gap analyses. Responsibilities include improving manufacturing processes, evaluating supplier documentation, and supporting audits, with possible travel two or three times a year.

Design and oversee PCB schematics and layouts for analog and digital circuitry (including high-speed transceivers, 10+ Gbps links, FPGAs, and microcontrollers). Ensure signal integrity and EMI suppression, build and run electro-optic test setups, characterize and debug circuits with lab instruments, develop measurement-driving software, analyze results, and maintain detailed design and test documentation.

Hands-on role owning multiple hardware test setups for validation of autonomous vehicle hardware. Perform root cause/corrective action and debugging, and support environmental and vibration testing and validation as a test infrastructure owner.

Lead hardware reliability testing and validation for automotive power and compute systems. Develop and run stress, environmental, and failure analyses; perform root-cause investigations; collaborate across electrical, firmware, mechanical, software, and manufacturing teams; report findings and corrective actions; drive reliability improvements and mentor engineers.

Lead hardware reliability testing and validation for automotive power and compute systems. Develop and run stress, environmental, and failure-mode tests; analyze failures, drive root-cause and corrective actions, report findings, and mentor reliability engineers while collaborating with cross-functional teams to improve hardware design and meet automotive reliability standards.

Debug and root-cause production hardware issues across CPU/ASIC, power, SI, clocking, PCIe, optics and components. Perform lab measurements, collaborate with software, manufacturing, and component teams, write debug scripts, implement fixes in firmware/schematics/BOM/fab, identify test escapes, and present RCA to executives and customers.

Lead product assurance and quality activities for hardware and PCB programs: inspections, testing witness, audits, supplier/vendor surveys, develop/implement quality procedures, manage corrective actions, SPC, budgets, and cross-functional team liaison. Mentor staff and support proposals and program quality requirements. Occasional overnight travel required.

Lead board-level architecture, schematic/BOM creation, PCB layout oversight, and manufacturing for photonic/data-center platforms. Drive system bring-up, debugging, validation, cross-functional coordination, vendor management, and project execution to deliver server and rack-level solutions.

The Principal Infrastructure Hardware Engineer will design and deliver hardware systems for SiTime products, oversee architecture, manufacturing, and provide technical mentorship across teams.

Lead design and delivery of analog and mixed-signal electronics for compact, high-performance LiDAR hardware. Own end-to-end development from schematic to production, ensure SI/PI and EMI/EMC compliance, execute bring-up and validation (DVT/EVT), analyze trade-offs for power/cost/form factor, and collaborate across systems, mechanical, and firmware teams for reliable manufacturable products.

Validate and qualify server electronics, mechanicals, and documentation; define and execute component test strategies; perform level-3 failure analysis on field returns; manage product changes using PLM tools; collaborate with suppliers, quality, and manufacturing to resolve design and production issues.

Design, test, and validate next-generation server hardware and components for performance, power, and reliability. Diagnose and resolve hardware issues across engineering and manufacturing, document results, and develop/maintain test scripts. Collaborate with internal teams and OEM/ODM partners to scale platforms for global deployment.

Lead end-to-end design, development, validation, and troubleshooting of complex multi-layer PCB circuit packs. Perform schematic capture, signal integrity assessment, component selection, PCB layout guidance, lab validation, fabrication coordination, documentation for TL9000 compliance, and mentor junior engineers.

Lead hardware product roadmap for XLynk and Manufacturing Partner lines, manage third-party hardware integrations, define global hardware requirements, ensure compliance and certifications across territories, and validate integration testing before customer deployment. Collaborate with engineering, sales, and compliance teams and operate onsite in Schenectady, NY.

Lead on-site technical authority for datacenter hardware reliability and fleet health. Troubleshoot complex hardware failures, drive root cause analysis and corrective actions, coordinate with vendors and cloud providers, establish maintenance standards and runbooks, support new hardware introductions and spare parts strategy, mentor technicians, and analyze failure trends to improve reliability across large-scale GPU and server deployments.

Lead hardware test engineering for RF and digital systems: design and implement test methods/equipment, perform electrical/RF troubleshooting, analyze yield/test data, collaborate with design and manufacturing teams, support technicians, and drive corrective actions to meet program yield targets.

Lead architecture and development of rugged board‑level hardware for high‑speed embedded systems. Design and verify advanced digital circuits (400G+, PCIe Gen5+, DDR5+), mentor engineers, establish hardware standards, support proposals, and drive DFM/DFA/DFT with cross‑functional teams to deliver high‑reliability defense/aerospace solutions.

Lead board-level design of ruggedized, high-speed digital hardware from concept through production for defense/aerospace systems. Architect FPGA and CPU-based solutions, ensure signal integrity and manufacturability, establish design standards, support proposals, and collaborate with manufacturing for DFM/DFT.

The Senior Hardware Integration and Test Engineer will lead hardware integration and testing tasks, develop test plans, manage project risks, and mentor junior engineers within a multidisciplinary team.

Design and develop hardware from concept through production for microcontroller-based systems. Create analog and mixed-signal circuits, power supplies, and manage signal integrity. Use EDA tools for schematic/PCB design, validate prototypes with lab equipment, ensure EMI/EMC compliance (automotive), and collaborate with firmware, mechanical, and test teams to ensure manufacturability and robustness.

Design and execute comprehensive hardware tests, develop manufacturing test setups and automated test systems, analyze results to identify defects, collaborate with engineering to resolve issues, mentor junior engineers, and document procedures to ensure production readiness.

Lead board‑level hardware design for consumer network products: define architecture, select components, create schematics, review PCB layouts, perform board bring‑up, debug and validate hardware, support EVT/DVT/PVT and mass production, ensure regulatory compliance, optimize cost/reliability, and mentor junior engineers.

Lead design, implementation, validation, and production of SSD hardware from concept through sustaining. Drive interoperability and system-level tradeoffs (mechanical, thermal, power, SI), diagnose hardware issues with partners and JDMs, lead failure analysis, review test plans, incorporate automation/AI into design and validation, and mentor junior engineers. Primarily on-site in Santa Clara, CA.

Design and validate automotive-grade compute hardware from concept to production: create schematics, guide PCB layout, collaborate with firmware/software teams, execute test plans, and engage vendors to ensure performance, reliability, and manufacturability of vehicle compute platforms.