Top Hardware Engineer Jobs in Santa Cruz, CA

Lead failure analysis and root-cause corrective actions for networking hardware issues from field and factory sources. Analyze quality metrics, debug complex board- and system-level hardware, review new-product test reports, and drive quality improvements, change management, and multisourcing activities. Collaborate with engineering, manufacturing, operations, customer support, vendors, and customers. Provide technical leadership, document lessons learned, and mentor junior engineers.

Maintains and troubleshoots server, storage, networking, cabling, and power hardware across a large-scale production data center fleet. Writes Python automation scripts, reviews logs and alerts, performs diagnostics, supports deployments, builds hardware health dashboards, coordinates with DevOps, supply chain, and vendors, and assists with hardware evaluation and reliability improvements. Requires on-call availability and travel to data center sites.

Designs and verifies ultra-high-speed PCB circuits and new routing-system hardware for Nokia’s Service Router products. Responsibilities include schematic and board design, simulation, design verification, production release, board bring-up, debugging, and hardware-lab testing. The role also maintains hardware and system integrity while collaborating with engineering teams to deliver reliable high-performance digital hardware.

Leads electrical test hardware development and verification for TeraWave spacecraft avionics, including test equipment design, requirements derivation, procedures, integration, qualification, acceptance, and production scaling. Coordinates cross-functional teams, leads flight-hardware test campaigns, investigates anomalies, drives corrective actions, and develops automation and data acquisition infrastructure for repeatable, high-throughput testing.

Leads electrical test hardware development and verification for TeraWave spacecraft avionics, from requirements derivation and test equipment design through qualification, acceptance, integration, and flight support. Owns test plans, procedures, interfaces, automation, instrumentation, and data acquisition. Leads electrical and RF test campaigns, anomaly investigations, root-cause analysis, and corrective actions while coordinating with systems, design, manufacturing, and production engineering teams to create scalable, high-throughput test infrastructure.

Leads electrical test hardware development and verification for TeraWave spacecraft avionics, including test equipment design, requirements derivation, procedures, test campaigns, automation, EMI/EMC testing, anomaly resolution, and production-scale test infrastructure. Coordinates with systems, design, manufacturing, and production engineering teams from concept through qualification, acceptance, integration, and flight support.

Leads electrical test hardware development and verification for TeraWave spacecraft avionics. Responsibilities include deriving requirements, designing scalable test equipment and ground support equipment, developing procedures, leading bench and vehicle-level test campaigns, performing RF and EMI/EMC testing, investigating anomalies, and implementing automation and data acquisition infrastructure. The role coordinates across systems, design, manufacturing, and production engineering teams while supporting qualification, acceptance, integration, and flight readiness.

Design and develop wireless power transfer and energy-harvesting hardware for IoT and wearable devices. Apply power electronics, RF and electromagnetic theory to create ICs and circuits, integrate solutions into scalable systems, optimize energy efficiency, and drive sustainable innovation for large sensor networks.

Designs and validates electrical and electronic components, subsystems, integrated circuitry, and hardware solutions. Develops test plans covering tolerances, form, fit, function, shock, vibration, EMI, safety, reliability, thermal performance, and power. Performs feasibility, margin, validation, modeling, and empirical analyses; collaborates with internal and outsourced engineering partners; evaluates production reliability and supports prototype fabrication for reliable, cost-effective products.

Design and develop high-speed, high-density ASIC package layouts and IC substrates. Responsibilities include substrate breakout, pin assignment optimization, routing, placement, stack-up, power distribution, CAD library development, feasibility studies, and resolving manufacturing, cost, and electrical issues using Cadence tools.

Design and develop physical layouts for silicon interposers used in NVIDIA products. Collaborate with package technical leads, signal integrity and technology engineers, and design teams to deliver package solutions. Conduct feasibility studies, floorplanning, custom layout, design-rule and netlist verification, and layout trade-off analysis. Resolve manufacturing, electrical, cost, and scheduling issues while using Cadence tools and verification flows such as DRC and LVS.

Tests, validates, and troubleshoots next-generation cloud server hardware for performance, power, reliability, and quality. Develops test scripts, documents results, identifies defects, recommends improvements, and resolves hardware issues across engineering and manufacturing environments. Requires hands-on embedded systems debugging, Linux and scripting experience, and knowledge of server architecture, firmware, operating systems, networking, storage, and hardware acceleration technologies.

Develop and operate Akamai’s Linux-based cloud infrastructure, including bare-metal and virtual machine platforms, kernels, operating systems, and KVM/QEMU virtualization. Build software, automation, observability, and infrastructure enhancements at scale; troubleshoot complex distributed-system issues; collaborate across engineering and operations; mentor team members; and participate in on-call service restoration.

Designs and maintains high-speed digital hardware for Nokia Service Router products. Responsibilities include ultra-high-speed PCB circuit design, simulation, verification testing, board bring-up, laboratory debugging, and taking complex board designs from concept through production release. The role requires collaboration with engineering teams, ownership of hardware integrity, and practical use of oscilloscopes, logic analyzers, and digital debugging tools.

Designs and develops FPGA SmartNIC networking acceleration for Microsoft Azure. Responsibilities include hardware architecture evaluation, RTL coding in Verilog/SystemVerilog, simulation, hardware testing, debugging, verification, scripting, software development, Agile collaboration, and production DevOps support. The role partners across hardware and software teams to deliver cloud networking infrastructure, including SDN capabilities, packet manipulation, and performance improvements.

Design and deliver complex hardware systems and sub-assemblies from concept through production. Responsibilities include defining specifications, architecting systems, evaluating suppliers, guiding schematic and layout reviews, developing EDVT/MDVT and EMI/EMC test plans, and validating prototypes in the lab. The role requires cross-functional collaboration across architecture, semiconductor, software, manufacturing, and external partners, with emphasis on high-speed optical and electrical I/O, signal and power integrity, thermal performance, reliability, compliance, cost, and schedule.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

Designs electrical control systems for conveyor and material-handling equipment, including power calculations, 480V and 120V schematics, I/O drawings, PLC and panel layouts, field-device layouts, and material specifications. Collaborates with customers, sales engineers, and project managers to define requirements. Inspects, tests, commissions, and troubleshoots motor control panels for compliance with design standards, codes, and project specifications.

Owns the hardware lifecycle for GPU and infrastructure assets, including fleet health monitoring, vendor RMA workflows, firmware and BIOS upgrades, burn-in testing, failure investigation, inventory accuracy, capacity planning, spare-parts strategy, runbook creation, and new platform qualification. The role serves as the technical owner of physical compute platforms and supports high-density GPU infrastructure across sites.

Develop and own compute and GPU server platforms from architecture through global deployment. Responsibilities include schematic and layout reviews, design for manufacturability, new product introduction, board and system bring-up, validation, debugging, firmware and BIOS feature management, technology qualification, and vendor coordination. The role requires hands-on server architecture, board-level design, Linux and scripting expertise, platform validation, and five-day-per-week presence in the Cambridge office.

Leads end-to-end electrical engineering for access control hardware, including component selection, PCB design, DFM, validation, compliance, failure analysis, and production readiness. Collaborates with mechanical and software teams on integrated products, develops quantitative validation plans, manages EMC and regulatory certification, and mentors junior engineers. The role also supports high-speed digital, power, imaging, wireless, and embedded system integration.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Debug and resolve complex hardware/software issues for manufacturing test stations. Lead commissioning and release-to-manufacturing of opto-electrical test stations, improve test uptime, provide documentation and support to contract manufacturers and vendors, coordinate equipment RFQs/RMAs, and use AI tools for data analysis.

Design and optimize high-speed, high-density ASIC package layouts and substrate breakouts. Perform pinout optimization, routing, placement, stack-up, power distribution, CAD library development, feasibility studies, and productivity methodology improvements while collaborating with package leads and cross-functional teams.

Design and perform physical layout for silicon interposers using Cadence Virtuoso; run DRC/LVS and verification (Calibre, ICV, Thunder); perform feasibility studies, floorplanning, custom layout, and collaborate with package, SI, and technology teams to meet schedule, cost, manufacturability, and electrical goals.