Top Hardware Engineer Jobs in Portland, OR

Design and develop embedded hardware platforms using Intel processors, ARM-based SoCs, and FPGA fabric. Create schematics, select components, support multilayer PCB layout, and conduct signal and power integrity analysis. Lead hardware bring-up, validation, debugging, manufacturing support, and technical documentation. Design basic power converters, improve engineering processes, and mentor early-career engineers while ensuring manufacturability, reliability, compliance, and quality-system alignment.

Lead architecture, design, validation, and troubleshooting of DC-DC power delivery systems for compute, storage, and AI platforms. Drive component qualification, EMI/thermal/reliability testing, supplier and ODM collaboration, root-cause analysis, and mentor junior engineers while influencing product architecture and roadmaps.

Owns the hardware lifecycle for GPU and infrastructure assets, including fleet health monitoring, vendor RMA workflows, firmware and BIOS upgrades, burn-in testing, failure investigation, inventory accuracy, capacity planning, spare-parts strategy, runbook creation, and new platform qualification. The role serves as the technical owner of physical compute platforms and supports high-density GPU infrastructure across sites.

Perform deep technical teardown and architectural analysis of AI/datacenter hardware (GPUs, CPUs, ASICs). Drive sample preparation, failure analysis, use FIB/SEM/X-ray tools, interpret design/process trade-offs (DTCO/STCO), co-author research, and expand lab capabilities and tooling.

Validate server hardware components and new platform designs through power, thermal, performance, firmware, and automation testing. Maintain hardware test infrastructure, document technical findings, coordinate with ODM/OEM partners, and collaborate with software teams on BIOS, kernel, and firmware optimization. The role requires expertise in server architectures, validation methodologies, Linux, Python, Bash, Redfish, IPMI, and industry standards including PCIe, NVMe, and DDR.

Design and develop wireless power transfer and energy-harvesting hardware for IoT and wearable devices. Apply power electronics, RF and electromagnetic theory to create ICs and circuits, integrate solutions into scalable systems, optimize energy efficiency, and drive sustainable innovation for large sensor networks.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Design and validate PCB-based analog, mixed-signal, and digital hardware for test and measurement products. Responsibilities include schematic capture, PCB layout support, signal integrity analysis, board bring-up, laboratory testing, debugging, documentation, and collaboration with multidisciplinary engineering teams. The role also supports manufacturing and sustaining engineering activities, including troubleshooting production and field issues.

Develop and maintain full-chip physical implementation flows for SoC designs, including floorplanning, partitioning, hierarchical block integration, placement and routing coordination, power grid planning and IR analysis, CTS strategy integration, and scalable multi-block/multi-power-domain assembly methodologies using Innovus.

Lead architecture, bring-up, validation, optimization, and deployment of networking infrastructure for large-scale AI training and inference. Define networking requirements, design Layer 3/4 and RDMA/AI fabric solutions, develop validation and observability tooling, perform packet-level debugging and root-cause analysis, and collaborate across silicon, firmware, software, and Azure teams to ensure performance, scalability, and reliability of hyperscale AI clusters.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

Debug and resolve complex hardware/software issues for manufacturing test stations. Lead commissioning and release-to-manufacturing of opto-electrical test stations, improve test uptime, provide documentation and support to contract manufacturers and vendors, coordinate equipment RFQs/RMAs, and use AI tools for data analysis.

Provides technical leadership and customer support for Marvell switching, PHY, and processor SoC products. Architects hardware solutions, investigates and reproduces hardware and software issues, performs schematic reviews, debugs boot sequencing and customer-reported problems, and supports Linux BSPs, U-Boot, device drivers, and board designs. Serves as a liaison among customers, Avnet field applications engineers, and Marvell engineering teams, while delivering training and occasional customer-site support.

Design and optimize high-speed, high-density ASIC package layouts and substrate breakouts. Perform pinout optimization, routing, placement, stack-up, power distribution, CAD library development, feasibility studies, and productivity methodology improvements while collaborating with package leads and cross-functional teams.

Design and perform physical layout for silicon interposers using Cadence Virtuoso; run DRC/LVS and verification (Calibre, ICV, Thunder); perform feasibility studies, floorplanning, custom layout, and collaborate with package, SI, and technology teams to meet schedule, cost, manufacturability, and electrical goals.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.