Top Hardware Engineer Jobs in Portland, OR

Lead architecture, design, validation, and troubleshooting of DC-DC power delivery systems for compute, storage, and AI platforms. Drive component qualification, EMI/thermal/reliability testing, supplier and ODM collaboration, root-cause analysis, and mentor junior engineers while influencing product architecture and roadmaps.

Perform deep technical teardown and architectural analysis of AI/datacenter hardware (GPUs, CPUs, ASICs). Drive sample preparation, failure analysis, use FIB/SEM/X-ray tools, interpret design/process trade-offs (DTCO/STCO), co-author research, and expand lab capabilities and tooling.

Leads enterprise HDD qualification for Azure-scale deployments, translating requirements into validation strategies and automated test suites. Analyzes failures using traces, logs, telemetry, and diagnostics; partners with suppliers on debugging and corrective actions; drives reliability, security, performance, interoperability, and serviceability improvements. Coordinates cross-functional technical initiatives, advances qualification methodologies, influences industry standards, and mentors engineers.

Designs and validates electrical and electronic components, subsystems, integrated circuitry, and hardware solutions. Develops test plans covering tolerances, form, fit, function, shock, vibration, EMI, safety, reliability, thermal performance, and power. Performs feasibility, margin, validation, modeling, and empirical analyses; collaborates with internal and outsourced engineering partners; evaluates production reliability and supports prototype fabrication for reliable, cost-effective products.

Design and develop wireless power transfer and energy-harvesting hardware for IoT and wearable devices. Apply power electronics, RF and electromagnetic theory to create ICs and circuits, integrate solutions into scalable systems, optimize energy efficiency, and drive sustainable innovation for large sensor networks.

Tests, validates, and troubleshoots next-generation cloud server hardware for performance, power, reliability, and quality. Develops test scripts, documents results, identifies defects, recommends improvements, and resolves hardware issues across engineering and manufacturing environments. Requires hands-on embedded systems debugging, Linux and scripting experience, and knowledge of server architecture, firmware, operating systems, networking, storage, and hardware acceleration technologies.

Designs and maintains high-speed digital hardware for Nokia Service Router products. Responsibilities include ultra-high-speed PCB circuit design, simulation, verification testing, board bring-up, laboratory debugging, and taking complex board designs from concept through production release. The role requires collaboration with engineering teams, ownership of hardware integrity, and practical use of oscilloscopes, logic analyzers, and digital debugging tools.

Design and develop embedded hardware platforms using Intel processors, ARM-based SoCs, and FPGA fabric. Create schematics, select components, support multilayer PCB layout, and conduct signal and power integrity analysis. Lead hardware bring-up, validation, debugging, manufacturing support, and technical documentation. Design basic power converters, improve engineering processes, and mentor early-career engineers while ensuring manufacturability, reliability, compliance, and quality-system alignment.

Lead architecture, bring-up, validation, optimization, and deployment of networking infrastructure for large-scale AI training and inference. Define networking requirements, design Layer 3/4 and RDMA/AI fabric solutions, develop validation and observability tooling, perform packet-level debugging and root-cause analysis, and collaborate across silicon, firmware, software, and Azure teams to ensure performance, scalability, and reliability of hyperscale AI clusters.

Leads system-level electrical design for AI and cloud server hardware, including detailed specifications, schematics, board reviews, BOM, DFT, DFM, bring-up, validation, testing, troubleshooting, and issue resolution. Collaborates across thermal, mechanical, firmware, OS, and infrastructure teams while guiding ODM/OEM partners to deliver reliable, high-performance hardware at scale.

Architects and validates DC/DC power delivery systems for compute, storage, and AI platforms. Leads multiphase regulator and point-of-load converter design, simulation, integration, testing, bring-up, and troubleshooting. Guides power architecture, component selection, risk mitigation, supplier qualification, and root-cause analysis. Collaborates with ODMs, suppliers, and cross-functional engineering teams while influencing product roadmaps and mentoring engineers.

Lead Azure hardware platform validation and debugging from post-silicon bring-up through production deployment. Develop validation strategies, automation, tooling, and qualification processes; investigate complex hardware, firmware, operating system, driver, and cloud-service issues; and drive corrective actions. Collaborate across architecture, security, manufacturing, performance, and infrastructure teams to improve platform availability, reliability, performance, observability, and operational scale.

Design and architect hardware systems, perform trade-off analysis, develop and verify RTL, integrate and verify memory controllers and PHYs, and support customer deliveries. The role requires ASIC or FPGA design expertise, scripting and simulation experience, and collaboration with engineering and customer teams. Preferred experience includes synthesis, timing constraints, CDC/RDC, memory technologies, and AMBA protocols.

Develops platform hardware from system requirements through schematic capture, PCB layout, board bring-up, debugging, validation, and customer delivery. The role defines components and routing rules, evaluates BOM costs and design tradeoffs, ensures hardware-software compatibility, performs electrical and mixed-signal design activities, and leads power-on and system debug efforts. It requires cross-functional collaboration with architects, verification, manufacturing, project management, and technical teams.

Owns the hardware lifecycle for GPU and infrastructure assets, including fleet health monitoring, vendor RMA workflows, firmware and BIOS upgrades, burn-in testing, failure investigation, inventory accuracy, capacity planning, spare-parts strategy, runbook creation, and new platform qualification. The role serves as the technical owner of physical compute platforms and supports high-density GPU infrastructure across sites.

Develop and own compute and GPU server platforms from architecture through global deployment. Responsibilities include schematic and layout reviews, design for manufacturability, new product introduction, board and system bring-up, validation, debugging, firmware and BIOS feature management, technology qualification, and vendor coordination. The role requires hands-on server architecture, board-level design, Linux and scripting expertise, platform validation, and five-day-per-week presence in the Cambridge office.

Drive architecture and development of datacenter systems from chip-level components through full-scale deployments. Collaborate across silicon, software, networking, operations, suppliers, procurement, and customers to evaluate performance, power, cost, hardware, thermal, and mechanical tradeoffs. Lead multidisciplinary teams, guide product strategy, monitor competitive solutions, and execute systems from concept through production. The role requires deep hardware and server architecture expertise, plus experience spanning software and hardware.

Validate server hardware components and new platform designs through power, thermal, performance, firmware, and automation testing. Maintain hardware test infrastructure, document technical findings, coordinate with ODM/OEM partners, and collaborate with software teams on BIOS, kernel, and firmware optimization. The role requires expertise in server architectures, validation methodologies, Linux, Python, Bash, Redfish, IPMI, and industry standards including PCIe, NVMe, and DDR.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Design and validate PCB-based analog, mixed-signal, and digital hardware for test and measurement products. Responsibilities include schematic capture, PCB layout support, signal integrity analysis, board bring-up, laboratory testing, debugging, documentation, and collaboration with multidisciplinary engineering teams. The role also supports manufacturing and sustaining engineering activities, including troubleshooting production and field issues.

Develop and maintain full-chip physical implementation flows for SoC designs, including floorplanning, partitioning, hierarchical block integration, placement and routing coordination, power grid planning and IR analysis, CTS strategy integration, and scalable multi-block/multi-power-domain assembly methodologies using Innovus.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

Debug and resolve complex hardware/software issues for manufacturing test stations. Lead commissioning and release-to-manufacturing of opto-electrical test stations, improve test uptime, provide documentation and support to contract manufacturers and vendors, coordinate equipment RFQs/RMAs, and use AI tools for data analysis.

Provides technical leadership and customer support for Marvell switching, PHY, and processor SoC products. Architects hardware solutions, investigates and reproduces hardware and software issues, performs schematic reviews, debugs boot sequencing and customer-reported problems, and supports Linux BSPs, U-Boot, device drivers, and board designs. Serves as a liaison among customers, Avnet field applications engineers, and Marvell engineering teams, while delivering training and occasional customer-site support.

Design and optimize high-speed, high-density ASIC package layouts and substrate breakouts. Perform pinout optimization, routing, placement, stack-up, power distribution, CAD library development, feasibility studies, and productivity methodology improvements while collaborating with package leads and cross-functional teams.