Top Senior Hardware Engineer Jobs in Dallas, TX

Develop and maintain Python-based software for automating hardware tests, integrate results with manufacturing systems, build scalable test infrastructure and CI/CD pipelines, create monitoring/visualization (e.g., Grafana), and collaborate with hardware, systems, and QA teams to ensure reliable aircraft component validation.

Owns the hardware lifecycle for GPU and infrastructure assets, including fleet health monitoring, vendor RMA workflows, firmware and BIOS upgrades, burn-in testing, failure investigation, inventory accuracy, capacity planning, spare-parts strategy, runbook creation, and new platform qualification. The role serves as the technical owner of physical compute platforms and supports high-density GPU infrastructure across sites.

Own the full lifecycle of a large-scale HPC and AI compute fleet, including bare-metal provisioning, firmware and BIOS management, hardware troubleshooting, performance tuning, capacity planning, security hardening, and infrastructure automation. Validate next-generation NVIDIA platforms, collaborate with software, networking, and vendor teams, resolve complex component issues, and mentor junior engineers.

Validate server hardware components and new platform designs through power, thermal, performance, firmware, and automation testing. Maintain hardware test infrastructure, document technical findings, coordinate with ODM/OEM partners, and collaborate with software teams on BIOS, kernel, and firmware optimization. The role requires expertise in server architectures, validation methodologies, Linux, Python, Bash, Redfish, IPMI, and industry standards including PCIe, NVMe, and DDR.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Lead design, validation, and deployment of advanced hardware test systems for V-BAT. Architect PCBs and test interfaces for power electronics, RF, and communications; develop Python automated test sequences; design custom test fixtures and integrate PLCs, relays, and harnessing. Drive DFT-focused reviews, perform HASS/ESS/HALT testing, and mentor junior engineers to improve hardware reliability in aerospace environments.

Build and lead hardware quality industrialization processes from the ground up. Partner with engineering, supply chain, operations, suppliers, and manufacturing partners to establish repeatable quality systems; evaluate supplier processes; analyze field returns; lead root-cause investigations and corrective actions; define hardware test parameters and acceptance limits; manage product supply verticals such as PCBAs and harnesses; and ensure compliance with certification requirements.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

Lead design, simulation, validation, and lifecycle support of embedded digital and mixed-signal PCB hardware. Develop architectures, schematics, component selection, and high-speed interfaces (PCIe, DDRx, Ethernet, USB, SerDes). Perform SPICE simulations, signal/power integrity analysis, board bring-up, debugging, testing, and manufacturability support. Drive production transfer, failure analysis, and provide technical leadership across cross-functional teams.

Design and develop FPGAs for audio/video products, lead architecture decisions, perform PCB-level design/testing, simulate and test RTL, maintain existing products, manage schedules, and support cross-functional teams.

Validate and qualify server electronics, mechanicals, and documentation; define and execute component test strategies; perform level-3 failure analysis on field returns; manage product changes using PLM tools; collaborate with suppliers, quality, and manufacturing to resolve design and production issues.

Provides technical leadership and customer support for Marvell switching, PHY, and processor SoC products. Architects hardware solutions, investigates and reproduces hardware and software issues, performs schematic reviews, debugs boot sequencing and customer-reported problems, and supports Linux BSPs, U-Boot, device drivers, and board designs. Serves as a liaison among customers, Avnet field applications engineers, and Marvell engineering teams, while delivering training and occasional customer-site support.

Lead SI/PI technical work for next-generation ASIC packaging: define design rules, run pre/post-layout SI/PI simulations, analyze substrate SI/PI, collaborate with layout and system teams, mentor engineers, and drive packaging design and validation for high-performance ASICs.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.