Top Senior Hardware Engineer Jobs in Phoenix, AZ

Lead design, test, validation, and production transition of advanced avionics hardware (HUD). Perform schematic capture, PCB support, hardware validation, debugging, root-cause analysis, and ensure compliance with aerospace standards. Mentor junior engineers and collaborate cross-functionally to meet customer and regulatory requirements.

Design, test, and validate flight control hardware from prototype to production. Provide product engineering support to factory and field, mentor junior engineers, consult suppliers, ensure compliance with hardware standards, and propose technical improvements.

Owns the hardware lifecycle for GPU and infrastructure assets, including fleet health monitoring, vendor RMA workflows, firmware and BIOS upgrades, burn-in testing, failure investigation, inventory accuracy, capacity planning, spare-parts strategy, runbook creation, and new platform qualification. The role serves as the technical owner of physical compute platforms and supports high-density GPU infrastructure across sites.

Design and develop advanced aerospace hardware from concept through production, perform schematic capture and PCB support, validate and debug hardware, lead technical efforts, mentor junior engineers, and ensure compliance with aerospace standards.

Validate server hardware components and new platform designs through power, thermal, performance, firmware, and automation testing. Maintain hardware test infrastructure, document technical findings, coordinate with ODM/OEM partners, and collaborate with software teams on BIOS, kernel, and firmware optimization. The role requires expertise in server architectures, validation methodologies, Linux, Python, Bash, Redfish, IPMI, and industry standards including PCIe, NVMe, and DDR.

Lead design and development of ruggedized board-level hardware for defense/aerospace systems. Architect high-speed digital boards (FPGAs, secure processing, PCIe, DDR5, 400G Ethernet), establish design standards, ensure manufacturability and verification, support proposals, and mentor engineering teams through production.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Designs, validates, deploys, and maintains complex hardware, firmware, and embedded sensing systems. Responsibilities include developing technical specifications and validation plans, conducting field failure analysis, collaborating with third-party manufacturers, performing acceptance testing, supporting firmware teams, and owning camera, radar, and sensor-fusion functionality. The role requires hardware design, PCB and schematic experience, laboratory testing skills, familiarity with firmware codebases, high-speed interfaces, power systems, scripting, and strong communication skills.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

Lead board-level design of ruggedized, high-speed digital hardware from concept through production for defense/aerospace systems. Architect FPGA and CPU-based solutions, ensure signal integrity and manufacturability, establish design standards, support proposals, and collaborate with manufacturing for DFM/DFT.

The Senior/Staff Hardware Design Engineer will lead hardware design and system integration for AI/datacenter motherboard development, ensuring architectural alignment and performing rigorous analysis and optimization.

Provides technical leadership and customer support for Marvell switching, PHY, and processor SoC products. Architects hardware solutions, investigates and reproduces hardware and software issues, performs schematic reviews, debugs boot sequencing and customer-reported problems, and supports Linux BSPs, U-Boot, device drivers, and board designs. Serves as a liaison among customers, Avnet field applications engineers, and Marvell engineering teams, while delivering training and occasional customer-site support.

Lead SI/PI technical work for next-generation ASIC packaging: define design rules, run pre/post-layout SI/PI simulations, analyze substrate SI/PI, collaborate with layout and system teams, mentor engineers, and drive packaging design and validation for high-performance ASICs.

Design and optimize high-speed, high-density ASIC package layouts and substrate breakouts. Perform pinout optimization, routing, placement, stack-up, power distribution, CAD library development, feasibility studies, and productivity methodology improvements while collaborating with package leads and cross-functional teams.

Design and perform physical layout for silicon interposers using Cadence Virtuoso; run DRC/LVS and verification (Calibre, ICV, Thunder); perform feasibility studies, floorplanning, custom layout, and collaborate with package, SI, and technology teams to meet schedule, cost, manufacturability, and electrical goals.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.