Top Senior Hardware Engineer Jobs in Phoenix, AZ

Designs, develops, integrates, and qualifies electronic test hardware for aerospace products, including circuit card assemblies, printed board assemblies, subassemblies, and line replaceable units. Defines digital, analog, power, FPGA, and mixed-signal test architectures; supports PCB layout, board bring-up, validation, ATE integration, troubleshooting, and production deployment. Leads test hardware efforts across concurrent programs, drives design-for-testability, supports root-cause investigations, and mentors junior engineers.

Leads advanced aerospace hardware design from concept through production for next-generation Head-Up Display systems. Responsibilities include schematic capture, PCB design support, hardware validation, troubleshooting, debugging, root-cause analysis, design verification, regulatory compliance, and collaboration with software and systems engineering teams. Provides technical leadership and mentorship while ensuring products meet customer, aerospace, and export-control requirements.

Maintains and troubleshoots server, storage, networking, cabling, and power hardware across a large-scale production data center fleet. Writes Python automation scripts, reviews logs and alerts, performs diagnostics, supports deployments, builds hardware health dashboards, coordinates with DevOps, supply chain, and vendors, and assists with hardware evaluation and reliability improvements. Requires on-call availability and travel to data center sites.

Lead advanced aerospace hardware design from concept through production for Honeywell Anthem displays. Responsibilities include schematic capture, PCB design support, analog and digital circuit development, hardware validation, troubleshooting, debugging, root-cause analysis, design verification, qualification, and stakeholder collaboration. The role also provides technical leadership and mentorship while ensuring compliance with aerospace standards including DO-254 and DO-160.

Designs and validates electrical and electronic components, subsystems, integrated circuitry, and hardware solutions. Develops test plans covering tolerances, form, fit, function, shock, vibration, EMI, safety, reliability, thermal performance, and power. Performs feasibility, margin, validation, modeling, and empirical analyses; collaborates with internal and outsourced engineering partners; evaluates production reliability and supports prototype fabrication for reliable, cost-effective products.

Tests, validates, and troubleshoots next-generation cloud server hardware for performance, power, reliability, and quality. Develops test scripts, documents results, identifies defects, recommends improvements, and resolves hardware issues across engineering and manufacturing environments. Requires hands-on embedded systems debugging, Linux and scripting experience, and knowledge of server architecture, firmware, operating systems, networking, storage, and hardware acceleration technologies.

Develop and operate Akamai’s Linux-based cloud infrastructure, including bare-metal and virtual machine platforms, kernels, operating systems, and KVM/QEMU virtualization. Build software, automation, observability, and infrastructure enhancements at scale; troubleshoot complex distributed-system issues; collaborate across engineering and operations; mentor team members; and participate in on-call service restoration.

Designs and develops FPGA SmartNIC networking acceleration for Microsoft Azure. Responsibilities include hardware architecture evaluation, RTL coding in Verilog/SystemVerilog, simulation, hardware testing, debugging, verification, scripting, software development, Agile collaboration, and production DevOps support. The role partners across hardware and software teams to deliver cloud networking infrastructure, including SDN capabilities, packet manipulation, and performance improvements.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

Owns the hardware lifecycle for GPU and infrastructure assets, including fleet health monitoring, vendor RMA workflows, firmware and BIOS upgrades, burn-in testing, failure investigation, inventory accuracy, capacity planning, spare-parts strategy, runbook creation, and new platform qualification. The role serves as the technical owner of physical compute platforms and supports high-density GPU infrastructure across sites.

Develop and own compute and GPU server platforms from architecture through global deployment. Responsibilities include schematic and layout reviews, design for manufacturability, new product introduction, board and system bring-up, validation, debugging, firmware and BIOS feature management, technology qualification, and vendor coordination. The role requires hands-on server architecture, board-level design, Linux and scripting expertise, platform validation, and five-day-per-week presence in the Cambridge office.

Lead design and development of ruggedized board-level hardware for defense/aerospace systems. Architect high-speed digital boards (FPGAs, secure processing, PCIe, DDR5, 400G Ethernet), establish design standards, ensure manufacturability and verification, support proposals, and mentor engineering teams through production.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Lead board-level design of ruggedized, high-speed digital hardware from concept through production for defense/aerospace systems. Architect FPGA and CPU-based solutions, ensure signal integrity and manufacturability, establish design standards, support proposals, and collaborate with manufacturing for DFM/DFT.

The Senior/Staff Hardware Design Engineer will lead hardware design and system integration for AI/datacenter motherboard development, ensuring architectural alignment and performing rigorous analysis and optimization.

Design and optimize high-speed, high-density ASIC package layouts and substrate breakouts. Perform pinout optimization, routing, placement, stack-up, power distribution, CAD library development, feasibility studies, and productivity methodology improvements while collaborating with package leads and cross-functional teams.

Design and perform physical layout for silicon interposers using Cadence Virtuoso; run DRC/LVS and verification (Calibre, ICV, Thunder); perform feasibility studies, floorplanning, custom layout, and collaborate with package, SI, and technology teams to meet schedule, cost, manufacturability, and electrical goals.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.