Top Senior Hardware Engineer Jobs in Phoenix, AZ

Lead design, test, validation, and production transition of advanced avionics hardware (HUD). Perform schematic capture, PCB support, hardware validation, debugging, root-cause analysis, and ensure compliance with aerospace standards. Mentor junior engineers and collaborate cross-functionally to meet customer and regulatory requirements.

Design, test, and validate flight control hardware from prototype to production. Provide product engineering support to factory and field, mentor junior engineers, consult suppliers, ensure compliance with hardware standards, and propose technical improvements.

Design and develop advanced aerospace hardware from concept through production, perform schematic capture and PCB support, validate and debug hardware, lead technical efforts, mentor junior engineers, and ensure compliance with aerospace standards.

Lead design and development of ruggedized board-level hardware for defense/aerospace systems. Architect high-speed digital boards (FPGAs, secure processing, PCIe, DDR5, 400G Ethernet), establish design standards, ensure manufacturability and verification, support proposals, and mentor engineering teams through production.

Design and deliver secure compute hardware for post-quantum cryptography and orbital/terrestrial systems. Own power, thermal, enclosure, and bus architecture design; collaborate with software, security, and systems teams; support FPGA integration, manufacturability, reliability, and environment-specific constraints (radiation, vibration, thermal-vacuum). Deliver iterative hardware releases on aggressive timelines.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

Lead board-level design of ruggedized, high-speed digital hardware from concept through production for defense/aerospace systems. Architect FPGA and CPU-based solutions, ensure signal integrity and manufacturability, establish design standards, support proposals, and collaborate with manufacturing for DFM/DFT.

The Senior/Staff Hardware Design Engineer will lead hardware design and system integration for AI/datacenter motherboard development, ensuring architectural alignment and performing rigorous analysis and optimization.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Design and verify high-precision analog/mixed-signal IC blocks (references, ADC/DACs, regulators, comparators, op-amps); oversee physical implementation with layout/P&R teams; build silicon test infrastructure and test vectors; develop models and documentation; support silicon validation and integration with digital wrappers.

Design, test, and validate next-generation server hardware and components for performance, power, and reliability. Diagnose and resolve hardware issues across engineering and manufacturing, document results, and develop/maintain test scripts. Collaborate with internal teams and OEM/ODM partners to scale platforms for global deployment.

Lead SI/PI technical work for next-generation ASIC packaging: define design rules, run pre/post-layout SI/PI simulations, analyze substrate SI/PI, collaborate with layout and system teams, mentor engineers, and drive packaging design and validation for high-performance ASICs.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

Design and optimize high-speed, high-density ASIC package layouts and substrate breakouts. Perform pinout optimization, routing, placement, stack-up, power distribution, CAD library development, feasibility studies, and productivity methodology improvements while collaborating with package leads and cross-functional teams.

Design and perform physical layout for silicon interposers using Cadence Virtuoso; run DRC/LVS and verification (Calibre, ICV, Thunder); perform feasibility studies, floorplanning, custom layout, and collaborate with package, SI, and technology teams to meet schedule, cost, manufacturability, and electrical goals.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.