Top Senior Hardware Engineer Jobs in Phoenix, AZ

Lead design, test, validation, and production transition of advanced avionics hardware (HUD). Perform schematic capture, PCB support, hardware validation, debugging, root-cause analysis, and ensure compliance with aerospace standards. Mentor junior engineers and collaborate cross-functionally to meet customer and regulatory requirements.

Design, develop, test, and integrate embedded FPGA-based digital hardware for inertial sensors and fiber optic gyroscopes. Create VHDL/HDL designs, validate performance and reliability, troubleshoot hardware issues, document specifications and test results, and collaborate across systems, software, and hardware teams on new product development and R&D programs.

Design, test, and validate flight control hardware from prototype to production. Provide product engineering support to factory and field, mentor junior engineers, consult suppliers, ensure compliance with hardware standards, and propose technical improvements.

Design and develop advanced aerospace hardware from concept through production, perform schematic capture and PCB support, validate and debug hardware, lead technical efforts, mentor junior engineers, and ensure compliance with aerospace standards.

Lead design and development of ruggedized board-level hardware for defense/aerospace systems. Architect high-speed digital boards (FPGAs, secure processing, PCIe, DDR5, 400G Ethernet), establish design standards, ensure manufacturability and verification, support proposals, and mentor engineering teams through production.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

Lead board-level design of ruggedized, high-speed digital hardware from concept through production for defense/aerospace systems. Architect FPGA and CPU-based solutions, ensure signal integrity and manufacturability, establish design standards, support proposals, and collaborate with manufacturing for DFM/DFT.

Design and build prototype and pilot-ready systems that integrate software with hardware, edge devices, and cloud platforms. Develop APIs, telemetry, diagnostics, and cloud-native deployments using C#, .NET, SQL Server, and Azure. Lead field and lab testing, troubleshoot cross-stack issues, document findings, and mentor engineers while evaluating emerging technologies and producing recommendations for production systems.

The Senior/Staff Hardware Design Engineer will lead hardware design and system integration for AI/datacenter motherboard development, ensuring architectural alignment and performing rigorous analysis and optimization.

Design and verify high-precision analog/mixed-signal IC blocks (references, ADC/DACs, regulators, comparators, op-amps); oversee physical implementation with layout/P&R teams; build silicon test infrastructure and test vectors; develop models and documentation; support silicon validation and integration with digital wrappers.

Design, test, and validate next-generation server hardware and components for performance, power, and reliability. Diagnose and resolve hardware issues across engineering and manufacturing, document results, and develop/maintain test scripts. Collaborate with internal teams and OEM/ODM partners to scale platforms for global deployment.

Lead on-site technical authority for datacenter hardware reliability and fleet health. Troubleshoot complex hardware failures, drive root cause analysis and corrective actions, coordinate with vendors and cloud providers, establish maintenance standards and runbooks, support new hardware introductions and spare parts strategy, mentor technicians, and analyze failure trends to improve reliability across large-scale GPU and server deployments.

The Senior Package Layout Engineer will collaborate with teams to design IC substrates, optimize layouts, and improve productivity using Cadence tools.

Lead SI/PI technical work for next-generation ASIC packaging: define design rules, run pre/post-layout SI/PI simulations, analyze substrate SI/PI, collaborate with layout and system teams, mentor engineers, and drive packaging design and validation for high-performance ASICs.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.

As a Senior Hardware Engineer, you'll drive DPU integration into server platforms, execute validation testing, and develop automation for data analysis while collaborating with cross-functional teams and vendors.