Top Engineering Jobs

The Software Engineering Advisor is responsible for infrastructure engineering and support of Cloudera Hadoop systems, including installation, upgrades, and development of recovery procedures. The role involves collaboration with Data Engineering teams, development of automation and alerting scripts, and participation in on-call support.

Seeking a highly motivated Systems Engineering Manager to own the mechanical and systems design for the instrument, Callisto. Responsibilities include managing a team of engineers, overseeing engineering projects, and serving as a liaison between the engineering team and senior management.

The Senior Engineer in Endpoint Engineering at CarMax is responsible for designing solutions for endpoint systems, leading projects, analyzing requirements, and implementing infrastructure improvements. This includes overseeing security measures and ensuring high-quality performance across virtual and physical environments while collaborating with other engineers and management to streamline operations.

The Sr. Supplier Development Engineer for Starlink will own the supply continuity for printed circuit boards, collaborate with various teams for product delivery, manage supplier quality and processes, implement production approvals, and drive performance improvement through audits and technical recommendations.

As a SOC/ASIC Timing Signoff & Front-End Implementation Engineer at SpaceX, you will develop and support advanced timing/noise signoff flows for SOC designs, address design challenges in collaboration with cross-disciplinary teams, and optimize timing/power flows for deployment in innovative communication technologies.

As a Sr. ASIC Design Engineer at SpaceX, you will design digital ASICs and FPGAs for Starlink projects, analyze architectural trade-offs, define micro-architecture, and participate in all phases of the ASIC and FPGA design flow. Your work will support cutting-edge connectivity solutions for space and ground infrastructures.

The Wireless Modem Design Verification Engineer will be responsible for verifying digital ASIC and FPGA designs, writing test plans, developing test harnesses, and executing testing processes. This includes automating test case generation with Python and MATLAB, contributing to pre-silicon verification alongside cross-disciplinary teams, and ensuring the reliability of designs for SpaceX's Starlink network.

As an ASIC/FPGA Verification Engineer at SpaceX, you will be responsible for digital ASIC and FPGA verification, writing and reviewing test plans, and developing testbench infrastructure using SystemVerilog. Your role includes automating test cases with Python and MATLAB, and contributing to both pre-silicon and post-silicon validation of designs.

The Wireless Modem Design Verification Engineer is responsible for digital ASIC and FPGA verification, developing test plans, automating test case generation, and contributing to pre-silicon and post-silicon validation. The role involves collaboration with cross-disciplinary teams to improve connectivity solutions for SpaceX's Starlink network.

As a Design Verification Engineer, you will develop and execute verification strategies for digital ASIC and FPGA designs, including writing test plans and developing SystemVerilog test benches. You will work collaboratively across disciplines to deliver high-performance solutions for SpaceX's Starlink projects.

As a Design Verification Engineer, you will develop and execute test plans for ASICs and FPGAs, ensuring digital designs are verified at block and system levels. Responsibilities include writing test sequences, developing test harnesses, automating test case generation, and contributing to pre-silicon and post-silicon validation efforts within the Starlink project.

As an ASIC/FPGA Verification Engineer at SpaceX, you will be responsible for digital ASIC and FPGA verification, including writing and reviewing test plans, developing test harnesses, and executing test cases. You'll automate case generation using Python and MATLAB, contribute to various verification phases, and collaborate with multidisciplinary teams to ensure the functionality of designs for the Starlink network.

As a Design Verification Engineer at SpaceX, you will verify digital ASIC and FPGA designs, develop test plans using SystemVerilog, automate testing with Python and MATLAB, and contribute to the pre-silicon and post-silicon validation processes for next-generation technologies.

As a Field Engineer in Site Development, you will coordinate contractors, handle daily inspections, operate heavy equipment, ensure safety compliance, and manage various construction projects. Responsibilities include designing and activating infrastructure and resolving conflicts during construction.

The Sr. ASIC Design Verification Engineer will be responsible for digital ASIC and FPGA verification, writing and reviewing test plans, executing tests, and contributing to pre- and post-silicon validation. The role involves working with cross-disciplinary teams to develop next-generation FPGAs and ASICs for space and ground infrastructures, ensuring reliable communication for the Starlink network.

The Sr. RF/Analog IC Design Engineer at SpaceX will design, simulate, and model RF/analog/mixed-signal circuits. This role requires collaboration with cross-disciplinary teams to implement system algorithms and silicon solutions, targeting enhanced communication systems for both space and ground infrastructure, ultimately supporting the Starlink network.

The RF/Analog IC Design Engineer will design and model RF/analog/mixed-signal circuits, derive specifications, develop integrated circuit solutions, conduct analysis, and characterize prototypes for advanced communication systems. They will work collaboratively with various engineering teams to improve Starlink's network capabilities, focusing on effective design and production validation.