Top Design Engineer Jobs

Design and standardize telecommunications infrastructure for Rowan data centers, including ISP/OSP systems, fiber backbone and cabling, carrier/MEET‑ME facilities, network topology/IP strategies, and commissioning/testing (OTDR). Coordinate across engineering, construction, operations, customers, and vendors from design through turnover.

Design mechanical components and assemblies for RT and Datacenter product lines using 3D CAD (Autodesk Inventor). Create and revise production drawings, maintain drafting standards and BOMs in ERP, support prototyping, production troubleshooting, and cross-department communication to meet quality and safety standards.

The Design Engineer - Mechanical Systems designs, develops, and verifies helicopter mechanical systems, ensuring safety, weight, and cost objectives are met.

The Design Engineer - Airframe designs, develops, and verifies helicopter airframe structures, ensuring safety, weight, and cost objectives are met through various analysis and testing stages.

The electrical designer creates complete electrical designs under guidance, applying theoretical knowledge, drafting plans, and coordinating with other disciplines.

Design hospitality furniture from customer specifications: create and revise 3D models and 2D shop drawings, apply DFM/VE, specify materials/hardware, ensure code/ADA compliance, support testing, installation reviews, and cross-functional collaboration.

Design mechanical components for Low Voltage Assemblies (LVA) using SolidWorks and 3D CAD; produce drawings, BOMs, and technical documentation; coordinate design reviews with electrical/design engineers; track milestones, process engineering changes, and support manufacturing and assembly with technical issues.

Design and validate embedded SRAM macros at transistor level, supervise layout and verification, develop/automate SRAM compiler flows, explore advanced process-node techniques for optimal PPA, and collaborate with SoC, test, and productization teams to deliver production silicon IP.

Responsible for FPGA/CPLD design including micro-architecture, RTL coding, logic debug, timing closure, and collaboration with various teams for validation and implementation.

Design and implement TileLink interconnects, cache controllers, protocol bridges, and other uncore logic as configurable RTL generators (Chisel/Scala). Integrate designs into the Chisel/FIRRTL framework, enable automatic config/verification flows, perform sandbox verification, collaborate with verification teams, and produce documentation.

The role involves driving physical design from netlist to GDS, working on timing closure, physical verification, and collaborating with mixed signal teams. Candidates should have experience in Synopsys or Cadence tools and physical design.

Design and implement high-speed digital front-end and back-end for DSPs and silicon photonics IPs: define micro-architecture, calibration algorithms, translate to RTL/firmware, create synthesis constraints, drive timing closure, evaluate PPA trade-offs, and lead post-silicon bring-up, testing, characterization, and cross-functional production handoff.

Design and implement NVLink protocol and GPU subsystem logic: micro-architecture, RTL implementation and debug, timing- and power-optimized logic design, collaborate with verification and physical design teams, support floorplan, power/clock distribution, timing closure, and back-end verification; develop supporting flows and tools.

Design and implement highly-configurable TileLink interconnects, cache controllers, protocol bridges and other uncore RTL generators using Chisel/Scala. Drive performance and coherence improvements, integrate into Chisel/FIRRTL framework, collaborate on verification plans and documentation, and work with teams to deliver high-quality, configurable IP for SoCs.

The Mechanical Design Engineer will create 3D CAD and 2D drawings, gather product data, verify engineering documents, and conduct physical part measurements while collaborating with project leads.

Design high-speed networking hardware, including functional specifications, component selection, PCB layout, signal integrity simulation, and debugging prototypes.

The Senior Hardware Design Engineer develops high-speed networking hardware, conducts signal integrity simulations, mentors engineers, and integrates with various teams to ensure product success.

Design and validate isolated and non-isolated high-power converter stages and magnetics for MV/LV Solid State Transformer systems. Perform FEA-driven magnetics design, high-voltage isolation and safety testing, optimize loss/cost/size trade-offs, coordinate with mechanical, manufacturing and test teams, and own magnetics validation to meet performance and safety standards.

Lead the design and development of mixed-signal ICs, overseeing all phases from concept to production, focusing on high-speed interconnects and innovative methodologies.

Design analog-mixed signal integrated circuits, optimize for low power performance, and collaborate on silicon bring up and debugging.

The MMIC Design Engineer will lead the design and development of THz ICs for AI and hyperscale applications, overseeing the full design cycle and collaborating with teams to achieve project goals.

Responsible for full-chip or block-level physical design from netlist to GDSII, ensuring timing, power, and area targets are met. Collaborates with teams for design convergence and performs DRC/LVS/EM/IR debugging.

The AMR Layout Design Engineer designs and deploys AMR systems, collaborates with clients, resolves technical issues, and documents solutions.

Design, develop, and modify mechanical layouts, tooling, fixtures, and specifications. Troubleshoot complex mechanical problems, perform engineering analyses and tests, lead projects, oversee manufacturing/installation, and coordinate procurement of mechanical components while ensuring standards and documentation.

Responsible for designing and verifying complex digital circuits, mentoring junior engineers, collaborating with other disciplines, and providing technical guidance.