Top Design Engineer Jobs

3 Months AgoSaved
In-Office
2 Locations
Senior level
Senior level
Software
Lead verification planning and execution for high-performance out-of-order CPU core blocks (frontend, midcore, LSU, prefetch). Define verification strategies, develop environments, assertions, scoreboards, stimulus and coverage models, perform root-cause debug, partner with architecture and design teams, and deliver reusable methodology to close microarchitectural risks and achieve signoff.
Top Skills: CC++Constrained-Random VerificationEmulationFormal VerificationPythonRisc-VRtlRvvScoreboardsSystemverilogSystemverilog AssertionsUvm
3 Months AgoSaved
In-Office
2 Locations
Senior level
Senior level
Software
Drive functional verification for high-performance out-of-order CPU cores: create verification plans, develop UVM/SystemVerilog testbenches, write assertions and coverage, run constrained-random and directed tests, analyze/debug failures, and build reusable DV methodology and infrastructure to achieve verification signoff.
Top Skills: Constrained-Random VerificationEmulationFormal VerificationFunctional CoverageRtlSystemverilogSystemverilog Assertions (Sva)Uvm
Reposted 3 Months AgoSaved
Hybrid
Mountain View, CA, USA
120K-400K Annually
Mid level
120K-400K Annually
Mid level
Artificial Intelligence • Hardware • Software
As a Silicon DFT Engineer, you will design test solutions, integrate DFT functions, collaborate with various teams, and improve test quality for AGI silicon.
Top Skills: Dft CompilerI2CIjtagJtagMentor TessentPhy FirmwareSerdes PhySpiStreaming Scan Networks
Reposted 3 Months AgoSaved
In-Office
Allentown, PA, USA
Senior level
Senior level
Artificial Intelligence • Information Technology • Software • Consulting
Responsible for verifying ASIC/SOC designs through test plans, executing validation tests, and collaborating with engineers to ensure quality outcomes.
Top Skills: GitHvlOvmQuesta CdcSystem VerilogVcsVerdi
Reposted 3 Months AgoSaved
In-Office
Edison, NJ, USA
Senior level
Senior level
Renewable Energy
The Control Systems Design Engineer develops control strategies for battery systems, collaborates with engineering teams, designs algorithms, and enhances system performance, ensuring compliance with safety standards.
Top Skills: BmsCanEmsHmiIec 61850MatlabModbusPcsPlcScadaSimulink
Reposted 3 Months AgoSaved
In-Office
Wilmington, MA, USA
187K-281K Annually
Senior level
187K-281K Annually
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Senior Principal Engineer will architect digital data paths for high-speed CMOS ICs, develop calibration algorithms, and lead design integration for broadband communication systems.
Top Skills: Broadband Communication SystemsCmosDigital Communication SystemsHigh-Speed Digital Ic DesignRf CmosSerdesSignal Processing AlgorithmsSoftware-Defined Communications
Reposted 3 Months AgoSaved
In-Office
Bartlesville, OK, USA
60K-100K Annually
Senior level
60K-100K Annually
Senior level
Aerospace • Information Technology • Software • Biotech • Design
Design and develop hardware for natural gas flow measurement systems, lead investigations, conduct economic studies, and collaborate with cross-functional teams.
Top Skills: AllegroCadenceEmi/Emc ComplianceHardware DevelopmentLow Power ElectronicsMicrocontroller DesignOrcadPcb Layout
3 Months AgoSaved
In-Office
2 Locations
175K-230K Annually
Expert/Leader
175K-230K Annually
Expert/Leader
Artificial Intelligence • Hardware • Machine Learning • Software
Design and layout block- and chip-scale silicon photonic circuits from concept through tapeout and bring-up. Collaborate with analog, digital, packaging, product, and architecture teams to floorplan and integrate on-chip photonics, perform layout-driven simulation and verification, troubleshoot performance bottlenecks, improve layout/verification flows and PDKs, and support photonic product development and publications.
Top Skills: Cadence VirtuosoGdsfactoryGdsiiPdkPythonSilicon Photonics
3 Months AgoSaved
In-Office
2 Locations
148K-194K Annually
Senior level
148K-194K Annually
Senior level
Greentech • Energy
Design, release, validate, and sustain high-power PCBAs for battery systems. Own requirements, component selection, schematics, layouts, DFM, bring-up, testing, and compliance. Collaborate cross-functionally to ensure safety, reliability, and regulatory conformance.
Top Skills: AdcAltiumCan-FdDacEcadEthernetGate DriversHsdI2CIsospiJamaJIRAJtagLdoMcuMotor DriversMpuPcbaPlm (ArenaSensorsSmpsSomSpiTeamcenter)UartUl 1973Ul 1998Ul 9540Ul 991
Reposted 3 Months AgoSaved
In-Office
Wilmington, MA, USA
117K-161K Annually
Senior level
117K-161K Annually
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
Lead methodology improvements for physical design across complex chips and SoC programs. Develop and automate physical design flows, define best practices, analyze QoR (power, performance, area, timing, congestion), debug recurring implementation issues, and enable cross-functional teams (CAD, STA, DFT, RTL) to adopt scalable, repeatable methodologies. Provide technical guidance and targeted implementation support to validate and deploy improvements.
Top Skills: Ai-Based TechniquesCadence Implementation ToolsDftPythonStaSynopsys Physical Design ToolsTcl
Reposted 3 Months AgoSaved
In-Office
San Jose, CA, USA
152K-218K Annually
Senior level
152K-218K Annually
Senior level
Energy
Lead end-to-end mechanical design and development for product systems. Prototype using welding and machining, create and manage SolidWorks models, drawings, BOMs, ECNs, and PDM assemblies. Work with suppliers to resolve manufacturability and capacity issues and drive process improvements. Collaborate cross-functionally and support testing and fixture design.
Top Skills: Bom ManagementEcn (Agile)MachiningPdm/Cad VaultSolidworksWelding
Reposted 3 Months AgoSaved
In-Office
The Woodlands, TX, USA
Entry level
Entry level
Information Technology • Software
Responsible for developing and supporting responsive web applications, collaborating on larger features and independently managing smaller tasks while writing clean code.
Top Skills: .Net WebapiAngularjsAWSCSSGCPGruntGulpHTML5JavaScriptPythonSassSQL
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Reposted 3 Months AgoSaved
In-Office
Plymouth, MN, USA
Senior level
Senior level
Information Technology • Software
The Design Quality Engineer ensures compliance with quality regulations in the medical device industry, focusing on risk management, design verification, and validation processes.
Top Skills: Fda RequirementsGlpGmpIso ProceduresMddQsr
Reposted 3 Months AgoSaved
In-Office
The Woodlands, TX, USA
Senior level
Senior level
Information Technology • Software
Architect and develop responsive web applications for internal users. Requires significant experience in game design and technical proficiency in various programming languages.
Top Skills: .NetC#C++HololensHtc ViveJavaScriptPythonRestful ApisUnityUnreal
Reposted 3 Months AgoSaved
In-Office
Boulder, CO, USA
Mid level
Mid level
Information Technology • Software
Oversee software quality in medical device development, ensuring adherence to regulations, risk management, and mentoring design teams.
Top Skills: Agile Software DevelopmentCC++Fda Quality System RegulationIec 62304Iso 13485
Reposted 3 Months AgoSaved
In-Office
Durham, NC, USA
Senior level
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Staff Analog Design Engineer leads the design and development of complex analog and mixed-signal ICs, mentors junior engineers, and ensures successful project delivery through cross-functional collaboration.
Top Skills: Cadence Design SuiteMatlabSpice
Reposted 3 Months AgoSaved
In-Office
Wilmington, MA, USA
157K-227K Annually
Senior level
157K-227K Annually
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
As a Principal Mixed Signal Design Engineer, you lead the design of complex mixed-signal integrated circuits, drive architecture decisions, mentor engineers, and influence technology direction at ADI.
Top Skills: Analog And Digital IpCmos TechnologyLayout & ImplementationMixed-Signal Ic DesignPerformance OptimizationSimulation & Modeling
Reposted 3 Months AgoSaved
In-Office
San Jose, CA, USA
150K-350K Annually
Senior level
150K-350K Annually
Senior level
Artificial Intelligence • Hardware • Software
Ensure first silicon delivery for ASICs, develop test benches, and possess experience in hardware verification and scripting languages.
Top Skills: Hbm3PythonSystem VerilogVerilator
3 Months AgoSaved
In-Office
Long Beach, CA, USA
Mid level
Mid level
Aerospace • Hardware • Defense • Manufacturing
Design, analyze, build, and test gas-turbine components end-to-end. Create CAD and analysis models (CFD/FEA/system), produce manufacturing-ready drawings and GD&T, run hardware tests, instrument test articles, and iterate designs using test data.
Top Skills: Ai ToolsAnsysCfdFeaGd&TPythonSolidworks
3 Months AgoSaved
In-Office
4 Locations
Internship
Internship
Software
Develop and maintain a scalable Verification Platform: extend Chisel/CIRCT, build Scala libraries and Python tools for test harnesses, stimulus, and metadata querying, support end-to-end verification flows, and educate DV teams on best practices.
Top Skills: ChiselCirctCompilersDatabasesEda ToolsMlirOperating SystemsPythonScala
Reposted 3 Months AgoSaved
Hybrid
Santa Clara, CA, USA
175K-265K Annually
Senior level
175K-265K Annually
Senior level
Artificial Intelligence • Machine Learning • Software
The Design Verification Engineer will lead SoC verification cycles, utilizing methodologies like UVM/OVM, and contributing to innovative AI architectures.
Top Skills: CC++OvmSystemcSystemverilogUvm
Reposted 3 Months AgoSaved
In-Office
Seal Beach, CA, USA
100K-196K Annually
Senior level
100K-196K Annually
Senior level
Aerospace
The Mechanical Engineer focuses on leading spacecraft mechanical design, managing CAD development, and ensuring quality through collaboration with various teams. Responsibilities include overseeing designs, applying engineering principles, creating documentation, and mentoring others.
Top Skills: CadSiemens Nx
3 Months AgoSaved
In-Office
Houston, TX, USA
Senior level
Senior level
Artificial Intelligence • HR Tech • Information Technology • Consulting
Design and verify embedded hardware for A8 (or other 64-bit) microprocessors. Perform schematic capture, PCB/board layout, hardware debug, and verification testing. Requires 5+ years digital/embedded design experience. Contract role based in Houston, TX.
Top Skills: 64-Bit MicroprocessorA8 MicroprocessorBoard LayoutDebugSchematic CaptureVerification Testing
3 Months AgoSaved
In-Office
4 Locations
100K-500K Annually
Mid level
100K-500K Annually
Mid level
Hardware • Manufacturing
Design Verification Engineer responsible for verifying Tensix IP, building reusable SystemVerilog/Python testbenches and DV infrastructure, developing constrained-random and directed tests, closing coverage, debugging RTL/testbench/workload issues, and integrating CI/CD, simulation/emulation, and containerized regression systems. Collaborates with design, firmware, compiler, and architecture teams.
Top Skills: BashCi/CdContainerization (Docker)Eda ToolsEmulationFormal VerificationLinuxPythonRegression/Ci PipelinesRisc-VSimulationSystemverilogSystemverilog Assertions (Sva)
Reposted 3 Months AgoSaved
In-Office
San Jose, CA, USA
158K-170K Annually
Senior level
158K-170K Annually
Senior level
Information Technology • Semiconductor • Industrial
The Staff Engineer will design high-speed interfaces for NVME or Chiplet storage subsystems, oversee multi-functional team efforts, and mentor engineers for silicon success.
Top Skills: AsicPclePerlPythonSystemverilogVcsVerdiVerilog
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