Top Design Engineer Jobs

Build and ship polished production-quality UI (including mobile), craft layouts, typography, responsiveness, motion, and micro-interactions with Tailwind. Contribute components, tokens, and shared UI foundations. Implement interfaces using React, Next.js, and TypeScript, optimizing for performance, accessibility, and maintainability. Raise frontend craft via reviews and critiques while working closely with founders and customers.

Design and develop digital and analog circuits for mixed-signal embedded systems, focusing on circuits powered from AC mains, ensuring compliance with safety standards and troubleshooting during production.

Apply deep design expertise and BIM execution to independently design and deliver complex building projects. Develop and coordinate multidisciplinary Revit BIM models, evaluate code compliance and constructability, and translate engineering judgment into AI-enabled workflows. Collaborate with AI researchers and engineers to improve model generation, validation, and documentation, and support client engagements.

Develop and implement complex ASIC verification environments and test plans for high-performance network switch ASICs/FPGAs. Collaborate with architects and design teams, perform simulations, and drive verification to closure through tape-out and production-ready delivery.

Perform non-supervisory engineering for development testing, equipment qualification, factory acceptance testing, and commissioning. Duties include test planning, fixture design, execution, analysis, reporting, vendor test coordination, design support for rotating machinery, stress and vibration analysis, CAD modeling, and mentoring engineers.

Designs and develops silicon photonics integrated circuits, managing the entire development process, including testing and analysis for cutting-edge photonic devices and systems-on-chip.

Develop and apply AI techniques to enhance pre-silicon verification methodologies, collaborate with machine learning engineers, and improve design lifecycles.

The Formal Verification Engineer will develop innovative AI-driven solutions for chip design, employing formal methods and collaborating with ML and software teams.

The Staff Design Release Engineer will own the design and integration of compute and connectivity subsystems in autonomous vehicles, overseeing technical execution, documentation, and supplier alignment throughout the product lifecycle.

The Sr. Mechanical Engineer will design and develop machinery for the Starship production, collaborating with a team to maximize production efficiency.

As a Mechanical Engineer in Machine Design for Starship at SpaceX, you will design custom machinery and infrastructure, collaborate on vehicle design, perform structural analysis, and create engineering models. Responsibilities include supporting machine activation and manufacturing planning while working in a dynamic team environment.

Responsible for verification of networking ASICs, including developing test plans, environments, and executing verification processes using SystemVerilog. Requires strong experience in digital design and verification techniques.

Design and support fluid and mechanical systems for rocket engine ground test facilities across the full lifecycle. Produce P&IDs, models, drawings, and analyses; apply fluid mechanics and structural fundamentals to cryogenic, propellant, and high-pressure gas systems; support supplier coordination, hazard assessments (PHA/HAZOP), fabrication/start-up, configuration management in Windchill, and on-site commissioning and field operations.

Design and analyze production, test, integration, and advanced manufacturing tooling and custom machines for aerospace programs. Lead tooling projects from concept through fabrication, installation, proof testing, and commissioning while collaborating with designers and manufacturing to meet safety, cost, quality, and schedule goals.

Develop analog and system models to verify mixed-signal SoC functionality and connectivity. Build mixed-signal simulation testbenches, collaborate with design and architecture teams, run pre-silicon verification, and work with designers to debug and resolve issues.

Develop, deploy, and own RTL-to-GDSII physical design methodology and CAD flows for IP delivery. Automate PPA exploration, document flows, partner with design teams and EDA vendors, qualify new nodes/PDKs and EDA releases, and apply ML/LLMs where they improve flow optimization and scalability.

Ensure Falcon and Dragon flight hardware meets design criteria and reliability standards. Perform design reviews and test approvals, develop requirements and verification approaches, enable aircraft-like operations, drive design improvements with hardware teams, and build specialized design/analysis tools.

Develop and execute verification plans and environments for complex digital and mixed-signal IP. Create UVM testbenches, random and directed tests, assertions, functional models; perform coverage closure, debug RTL and gate-level failures, and collaborate with design teams and EDA vendors. May work with emulation and FPGA prototyping and adopt advanced verification flows.

Lead and execute design transfers from development through manufacturing and post-launch. Define system-level I&T requirements, develop test plans, identify and mitigate I&T and manufacturing risks, document best practices, and coordinate cross-functional multi-site teams. Support program planning, schedule/cost control, and customer/government interactions; travel occasionally.

Lead design and implementation of secure embedded controller and cryptographic ICs. Drive architecture, RTL development, verification, and bring-up. Support integration activities (lint, CDC, synthesis, DFT), work with physical design on STA/power/floorplanning, debug hardware/firmware interactions, and collaborate across global teams to deliver automotive, industrial, and security-focused ASIC/FPGA products.

Lead IO and pad ring planning for advanced SoC storage and memory controller designs. Create and validate pad ring DEFs, bump maps, IO netlists, and handoff deliverables. Coordinate with architecture, IP, packaging, implementation, foundry, and verification teams to ensure IO/package compliance, support silicon debug, and drive design improvements.

Design circuit board assemblies and system-level electronics, conduct design reviews, prepare documentation, provide technical support, and improve engineering practices.

Lead verification planning and execution for high-performance out-of-order CPU core blocks. Define verification strategy, develop robust UVM/SystemVerilog environments, write checkers/assertions, drive coverage closure, debug complex microarchitectural issues, and partner with architecture, RTL, performance, and software teams to raise verification quality and provide reusable methodology.

Lead verification planning and execution for high-performance out-of-order CPU core blocks. Define verification strategy, build testbenches, assertions, and coverage models, perform root-cause debug, work with architecture/RTL/performance teams, and drive verification closure and reusable methodology across core generations.

Lead functional verification for high-performance out-of-order CPU cores. Plan and execute block-to-core verification, develop UVM/SystemVerilog testbenches, write coverage and assertions, create constrained-random and directed tests, debug failures, collaborate with architects and RTL teams, and contribute reusable DV methodology and infrastructure to achieve signoff-quality verification.