Top Senior Hardware Engineer Jobs in Sacramento, CA

Lead the development of hardware platforms, collaborate with cross-functional teams, ensure design compliance, and mentor junior engineers in hardware development.

Develop and maintain full-chip physical implementation flows for SoC designs, including floorplanning, partitioning, hierarchical block integration, placement and routing coordination, power grid planning and IR analysis, CTS strategy integration, and scalable multi-block/multi-power-domain assembly methodologies using Innovus.

Develop and maintain transistor-level timing characterization flows, CAD infrastructure, and automation for custom IPs and memory. Collaborate with circuit, memory, STA, and methodology teams; validate Liberty models and SPICE-based characterizations; support platforms, scripts, and EDA vendor tool evaluations.

The Principal Hardware Engineer will lead the design of hardware systems for a satellite communications platform, focusing on power distribution, signal integrity, and PCB design, while ensuring high-reliability and fault tolerance in space environments.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

The Senior Electrical/Hardware Engineer designs and evaluates electrical systems, conducts feasibility studies, leads project teams, and provides guidance to junior staff, ensuring compliance and innovation in product development.

Lead on-site technical authority for datacenter hardware reliability and fleet health. Troubleshoot complex hardware failures, drive root cause analysis and corrective actions, coordinate with vendors and cloud providers, establish maintenance standards and runbooks, support new hardware introductions and spare parts strategy, mentor technicians, and analyze failure trends to improve reliability across large-scale GPU and server deployments.

The Senior Package Layout Engineer will collaborate with teams to design IC substrates, optimize layouts, and improve productivity using Cadence tools.

The role involves designing and developing detailed layouts of IC substrates, collaborating on high speed/density ASIC packages, optimizing pinout, and troubleshooting manufacturing and electrical issues.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

The Senior Mask Layout Design Engineer will perform physical layout for mixed-signal designs, collaborate with engineers, and ensure compliance with design rules.

The Sr. Hardware Design Engineer leads ASIC and FPGA projects, defining architecture, guiding RTL development, and mentoring junior engineers to deliver high-quality silicon solutions.

The Hardware Design Engineer will develop and verify digital designs using SystemVerilog, support hardware bring-up, and collaborate with teams.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.

The Mechanical Engineer will design and test robotic hardware, develop concepts, create 3D CAD designs, and support testing and integration.

Design and verify mixed-signal layouts in sub-micron CMOS technologies, collaborating with ASIC engineers to ensure integration in VLSI products.

The role involves physical layout design for high-speed mixed-signal circuits, collaborating with cross-functional teams, and utilizing various design and verification tools.

As a Senior Hardware Engineer, you'll drive DPU integration into server platforms, execute validation testing, and develop automation for data analysis while collaborating with cross-functional teams and vendors.