Top Design Engineer Jobs

Design, develop, validate, and release cooling components for gas and electrified vehicles (hoses, tubes, heaters, valves, pumps, air induction). Collaborate cross-functionally, manage suppliers, create and maintain DVP&R and DFMEA, apply APQP and DFSS, use CAE for simulations, and utilize CATIA V5/NX, Vis Mockup, and TeamCenter to meet program milestones and quality standards.

Develop and execute verification plans and testbenches for interconnect and chassis IP; build reusable verification components, constrained-random tests, and debug infrastructure; perform simulation and formal verification, analyze failures, close bugs, plan functional coverage, and improve verification automation and regression quality.

The ASIC Design Efficiency Engineer will develop innovative hardware and system designs, focusing on performance, power, and area improvements, while collaborating with cross-functional teams.

Lead electrical subsystem design for aircraft including wiring and harness design, power generation/distribution, requirements, testing, data analysis, troubleshooting, supplier coordination, and verification to ensure airworthiness.

Design and analyze aircraft electrical subsystems including wiring, power generation, conversion and distribution. Create requirements, perform electrical loads analysis, test planning, lab testing, data processing, troubleshooting, supplier coordination, and verification to ensure airworthiness and compliance with aerospace standards.

Lead design, development, and release of ADAS components (radar, cameras, ultrasonic, ECUs). Manage suppliers/programs, track and resolve issues, author/approve FMEAs/DVPRs, develop validation and diagnostics plans, support launch and warranty, and coordinate cross-functional integration and risk mitigation.

Develop and execute verification plans and testbenches for analog/mixed-signal ICs. Run RTL and gate-level simulations, coverage regressions, automate regressions with scripts, track closure, and improve DV methodology while collaborating with design and systems teams to ensure first-pass silicon success.

Lead verification planning and execution for high-performance out-of-order CPU core blocks. Define verification strategy, develop robust UVM/SystemVerilog environments, write checkers/assertions, drive coverage closure, debug complex microarchitectural issues, and partner with architecture, RTL, performance, and software teams to raise verification quality and provide reusable methodology.

Lead verification planning and execution for high-performance out-of-order CPU core blocks. Define verification strategy, build testbenches, assertions, and coverage models, perform root-cause debug, work with architecture/RTL/performance teams, and drive verification closure and reusable methodology across core generations.

Lead functional verification for high-performance out-of-order CPU cores. Plan and execute block-to-core verification, develop UVM/SystemVerilog testbenches, write coverage and assertions, create constrained-random and directed tests, debug failures, collaborate with architects and RTL teams, and contribute reusable DV methodology and infrastructure to achieve signoff-quality verification.

Lead verification planning and execution for high-performance out-of-order CPU core blocks (frontend, midcore, LSU, prefetch). Define verification strategies, develop environments, assertions, scoreboards, stimulus and coverage models, perform root-cause debug, partner with architecture and design teams, and deliver reusable methodology to close microarchitectural risks and achieve signoff.

Drive functional verification for high-performance out-of-order CPU cores: create verification plans, develop UVM/SystemVerilog testbenches, write assertions and coverage, run constrained-random and directed tests, analyze/debug failures, and build reusable DV methodology and infrastructure to achieve verification signoff.

As a Silicon DFT Engineer, you will design test solutions, integrate DFT functions, collaborate with various teams, and improve test quality for AGI silicon.

Responsible for verifying ASIC/SOC designs through test plans, executing validation tests, and collaborating with engineers to ensure quality outcomes.

The Senior Design Quality Engineer oversees design controls, risk management, and ensures compliance with regulations throughout the product lifecycle, providing guidance and managing documentation and validation activities.

The Control Systems Design Engineer develops control strategies for battery systems, collaborates with engineering teams, designs algorithms, and enhances system performance, ensuring compliance with safety standards.

The Solution Design Controls Engineer designs complex systems, estimates control solutions, and improves customer satisfaction while managing project details and training support.

Design and validate high-speed SerDes analog and mixed-signal circuits using advanced CMOS processes. Create schematics and simulation testbenches, supervise layout for LVS/DRC compliance, optimize power and performance, and validate functionality in silicon for interfaces like PCIe, USB, UCIe and high-speed Ethernet.

The Senior Mechanical Engineer will design and support automated machinery for the truss manufacturing industry, ensuring compliance with engineering standards while leading team members through project execution.

Design and execute UVM/SystemVerilog-based verification environments for block and full-chip ASIC/SoC designs. Create verification plans, constrained-random and directed tests, functional coverage and assertions, integrate third-party/custom VIPs, debug simulations and waveforms, support post-silicon verification, and automate simulation data analysis with scripting and design automation tools.

The Senior Principal Engineer will architect digital data paths for high-speed CMOS ICs, develop calibration algorithms, and lead design integration for broadband communication systems.

Develop and deploy CAD and EDA tooling for CPU/SoC/NoC teams, create automation using graph algorithms, support chip design flows, collaborate across architects, RTL and physical design teams, and drive cross-team tool deployment and productivity improvements.

Verify circuit designs using cutting-edge technology at Marvell. Responsibilities include developing verification environments, running simulations, and ensuring design meets specifications.

Design and develop complex pre-silicon and post-silicon verification environments, tests, and reference models for AI accelerators. Create verification plans, scoreboards, assertions, functional coverage, and debug simulation/emulation failures. Implement scalable scripts/Makefiles, collaborate across architecture, design, firmware, and validation teams, and apply Agile practices to drive comprehensive IP/SoC verification.

Senior technical authority for board and system hardware design of high-speed networking and AI platforms. Lead architecture, schematic and PCB reviews, PDN and thermal strategies, SI/PI review, hardware bring-up, debugging, manufacturability, and production transitions while advising customers and influencing product and silicon/platform roadmaps.