Top Design Engineer Jobs

18 Days AgoSaved
In-Office
Santa Clara, CA, USA
114K-171K Annually
Mid level
114K-171K Annually
Mid level
Artificial Intelligence • Automotive • Semiconductor
Design and lead internal processor IP blocks and integrate IP at the SoC level. Collaborate with architecture, verification, physical design, DFT and packaging teams to achieve tape-out quality. Run functional and gate-level simulations, CDC checks, and automation; produce micro-architectural specifications and support integration, debug, and verification activities.
Top Skills: AhbApbArm CpuAxiCdcChiCxlEda ToolsEthernetGate-Level SimulationPciePythonRtlSoc IntegrationSystemverilogTcl
18 Days AgoSaved
In-Office
Morrisville, NC, USA
115K-170K Annually
Expert/Leader
115K-170K Annually
Expert/Leader
Artificial Intelligence • Automotive • Semiconductor
Lead verification architecture, execution, and delivery for next-generation ASICs. Own emulation, post-silicon validation, lab bring-up, and tapeout efforts. Drive DV methodologies, tools, and cross-functional collaboration to ensure high-quality SoC products.
Top Skills: AsicCxlEmulationMemory SubsystemsPeripheral InterfacesPost-Silicon Validation (Psv)Processor CoresSocTapeout
18 Days AgoSaved
In-Office
Westborough, MA, USA
109K-161K Annually
Senior level
109K-161K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Design and implement UVM testbench components and verification collateral; develop test plans, constrained-random tests, and coverage metrics; run simulations, debug failures with designers, and contribute automation and AI-enhanced verification tools while mentoring junior engineers.
Top Skills: AmbaAssertion-Based VerificationAutomation ToolsCC++Command-Line ToolsConstrained-Random VerificationEthernetFunctional CoverageLinuxMemory CoherencyPciePerlPythonSystemverilogUvmVerilog
18 Days AgoSaved
In-Office
Morrisville, NC, USA
98K-144K Annually
Senior level
98K-144K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Create and execute verification plans for complex SoCs. Build constrained-random UVM testbenches in Verilog/SystemVerilog, use Synopsys VCS and Verdi for simulation and debug, write C/C++ and Python scripts, validate RTL and gate-level designs, analyze coverage metrics, and collaborate with design teams to resolve issues.
Top Skills: Amba Axi4CC++PciePythonRtlSynopsys VcsSynopsys VerdiSystemverilogUvmVerilog
18 Days AgoSaved
In-Office
Westborough, MA, USA
151K-223K Annually
Senior level
151K-223K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Develop and maintain UVM-based verification environments and testbenches for complex SoC architectures. Create test plans and coverage-driven tests, debug failures, collaborate with designers, and use SystemVerilog/Verilog, C/C++, and scripting (Python/Perl) on Linux platforms to ensure design quality.
Top Skills: ArmCC++CxlEthernetLinuxPciePerlPythonSystemverilogUvmVerilog
18 Days AgoSaved
In-Office
Los Angeles, CA, USA
124K-176K Annually
Senior level
124K-176K Annually
Senior level
Aerospace • Greentech • Transportation • Manufacturing
Design, analyze, and develop aircraft structural components (fuselage, wing, empennage) using composite and metallic materials. Create and release 3D CAD models and 2D drawings, perform structural analyses and FEA, define requirements and test plans, own structural testing and documentation, and collaborate with manufacturing, quality, and test teams while applying aerospace standards and GD&T.
Top Skills: CatiaCreoFeaGd&TInstrumentationSiemens NxSolidworksStructural TestingTeamcenter
Reposted 18 Days AgoSaved
Hybrid
2 Locations
90K-110K Annually
Mid level
90K-110K Annually
Mid level
Energy • Utilities • Renewable Energy
As a Project Engineer, you'll design gas distribution systems, lead mid-sized projects, mentor junior engineers, and ensure compliance and technical accuracy in delivery.
Top Skills: Engineering SolutionsNatural Gas DesignPipeline SystemsQuality Control
Reposted 18 Days AgoSaved
In-Office or Remote
8 Locations
Senior level
Senior level
Artificial Intelligence • Robotics
The Mechanical Engineer will design and test robotic hardware, develop concepts, create 3D CAD designs, and support testing and integration.
Top Skills: 3D CadFea
Reposted 18 Days AgoSaved
In-Office or Remote
8 Locations
Senior level
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Staff Engineer leads analog and mixed-signal block design, conducts design reviews, mentors junior engineers, and develops methodologies for advanced technology applications.
Top Skills: Cadence VirtuosoSpectreVerilog-A
Reposted 18 Days AgoSaved
In-Office or Remote
7 Locations
Senior level
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
As a Senior Digital Verification Engineer, lead verification planning for digital and mixed-signal designs, innovate verification environments, and mentor junior engineers.
Top Skills: PerlPythonSystemverilogTclUvm
Reposted 18 Days AgoSaved
In-Office
2 Locations
135K-202K Annually
Senior level
135K-202K Annually
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
Lead architecture and design of high-speed SerDes ICs for automotive applications, developing new technologies and specifications, while collaborating cross-functionally.
Top Skills: SystemverilogVerilog
Reposted 18 Days AgoSaved
In-Office
Centennial, CO, USA
107K-169K Annually
Senior level
107K-169K Annually
Senior level
Aerospace • Travel • Manufacturing
As a Propulsion Engineer, you'll design dynamic mechanisms of engines, create models, collaborate on specifications, and guide engine module integration with a focus on innovation and efficiency.
Top Skills: 3DxCadCatiaNxPython
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19 Days AgoSaved
In-Office
Boston, MA, USA
217K-267K Annually
Senior level
217K-267K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Lead STA sign-off and timing closure for silicon-photonics ASICs across process nodes. Develop timing constraints, run full-chip STA, automate ECOs with Tempus/PrimeTime, collaborate with RTL/DFT/architecture teams, and document best practices for synthesis through PnR and tapeout signoff.
Top Skills: Asic StaCadenceCmosDftPerlPlace And Route (Pnr)PrimetimePythonRtlShellSilicon PhotonicsSynopsysTclTempusTiming Constraints
19 Days AgoSaved
In-Office
Hawthorne, CA, USA
125K-150K Annually
Junior
125K-150K Annually
Junior
Aerospace • Other
Design and implement digital ASICs/FPGAs for Starshield: define micro-architecture, implement RTL (Verilog/SystemVerilog), collaborate on partitioning with DSP/RF, provide timing constraints, support synthesis/timing closure and physical implementation, work with verification, participate in silicon bring-up and lab validation, and develop automated test equipment.
Top Skills: AhbAltera Quartus IiAsicAxiEda ToolsFormalityFpgaIesPythonQuestaRtlSpyglassSynthesisSystemverilogTclTiming ClosureVcsVerilogXilinx Vivado
19 Days AgoSaved
In-Office
San Jose, CA, USA
144K-230K Annually
Expert/Leader
144K-230K Annually
Expert/Leader
Software • Semiconductor • Manufacturing
Work on ASIC physical design from concept to tapeout: integrate IPs, memories, SerDes, and I/O; implement clocking and test structures; evaluate power/area/performance trade-offs; perform timing analysis and closure, signal integrity work, chip-level planning, place-and-route, and physical verification while communicating with customers.
Top Skills: AsicClocking ArchitecturesCmosI/O SubsystemsIp IntegrationMemoriesPhysical VerificationPlace And RouteSerdesSignal IntegrityTapeoutTiming AnalysisTiming Closure
19 Days AgoSaved
In-Office
3 Locations
75K-158K Annually
Senior level
75K-158K Annually
Senior level
Information Technology • Consulting • Defense
Design, develop, integrate, test, and sustain RF and antenna system components. Build prototypes, run lab simulations, create schematics/BOMs, author interface documents, support design reviews, troubleshoot production issues, and contribute technical content for proposals.
Top Skills: Ansys StkAntennaDigital Communication SignalsGraspKeysight GenesysMatlabNetwork AnalyzerOscilloscopePcb LayoutRfSiemens PadsSignal AnalyzerSignal Generator
19 Days AgoSaved
In-Office
3 Locations
90K-190K Annually
Senior level
90K-190K Annually
Senior level
Information Technology • Consulting • Defense
Design, develop, integrate, test, and sustain RF system architecture and subsystems. Decompose requirements, define RF capabilities, select components, develop system models, and guide implementation. Provide technical direction and communicate with executives and stakeholders.
Top Skills: AesaAnsysCustom Test EquipmentGraspKeysight GenesysMatlabModel Based Systems EngineeringNetwork AnalyzerOscilloscopeSignal AnalyzerSignal GeneratorStk
19 Days AgoSaved
In-Office
3 Locations
165K-200K Annually
Senior level
165K-200K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Develop and maintain photonics PDK components and pcells, ensure synchronization between layouts, netlists, and models, author LVS/DRC decks, perform device extraction and LVS troubleshooting, build automated regression and CI pipelines, and collaborate across design, layout, and modeling teams to support tape-outs.
Top Skills: BashCadence PegasusCadence VirtuosoCi/CdDrcGdsfactoryGdstkGitKlayoutLinuxLvsNumpyPdkPytestPythonScipySiemens CalibreSkillSoiSvrfSynopsys Ic ValidatorTcl
19 Days AgoSaved
In-Office
Santa Clara, CA, USA
164K-312K Annually
Senior level
164K-312K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Lead end-to-end verification for chassis and interconnect IPs, build scalable UVM/SystemVerilog testbenches, drive simulation/formal convergence and coverage closure, collaborate with architecture/design/software, mentor engineers, and ensure functional signoff and performance/power goals.
Top Skills: AbvAi-Assisted ToolsAmba AceAmba AxiAmba ChiCC++CadCxlEda ToolsEmulationFpgaJaspergoldLow-Power VerificationMl-Driven VerificationPciePhysical DesignPythonRtlSvaSystemverilogTestbenchUcieUvmVc FormalVips
Reposted 19 Days AgoSaved
In-Office
Redmond, WA, USA
Mid level
Mid level
Information Technology • Internet of Things • Software • Consulting
The Design Verification Engineer will conduct design verification for consumer devices, create automated tests, execute test plans, identify design risks, and communicate project updates.
Top Skills: C++LuaTeam Foundation Server (Tfs)
Reposted 19 Days AgoSaved
Hybrid
Livermore, CA, USA
122K-143K Annually
Expert/Leader
122K-143K Annually
Expert/Leader
Information Technology • Security • Energy • Defense
The role involves developing HPC algorithms for optimal design, collaborating on simulation tasks, and conducting independent research, requiring a PhD and advanced programming skills.
Top Skills: C/C++CudaFortranMpiOpenmpPython
Reposted 19 Days AgoSaved
In-Office
San Jose, CA, USA
189K-301K Annually
Senior level
189K-301K Annually
Senior level
Semiconductor • Manufacturing
Develop verification infrastructure for AI accelerator IP blocks, create testbenches, mentor junior engineers, and debug across teams.
Top Skills: C/C++PerlPythonSystem VerilogUvm
Reposted 19 Days AgoSaved
In-Office
McGregor, TX, USA
Junior
Junior
Aerospace • Other
Design, build, and maintain test systems for rocket hardware testing. Collaborate with technicians to address real-world engineering challenges and meet testing deadlines.
Top Skills: CadSiemens Nx
Reposted 19 Days AgoSaved
In-Office
Beaverton, OR, USA
119K-163K Annually
Senior level
119K-163K Annually
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The role involves verifying analog and digital circuits, creating test benches, and applying verification methodologies to ensure product quality. It includes scripting for data processing and collaborating with design teams to resolve issues.
Top Skills: Cadence XceliumPerlPythonSynopsys VcsSystem VerilogUvm
Reposted 19 Days AgoSaved
In-Office or Remote
9 Locations
120K-145K Annually
Senior level
120K-145K Annually
Senior level
Consulting • Energy
Responsible for substation physical design, project planning, client relations, and staff development. Requires strong technical and project management skills.
Top Skills: EasypowerEtapPower Systems AnalysisSkm
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