Top Design Engineer Jobs

Reposted 7 Days AgoSaved
In-Office
Austin, TX, USA
Senior level
Senior level
Hardware
Develop, integrate, and validate BIOS/UEFI firmware for server/platform products. Support platform bring-up, boot flow validation, subsystem enablement, debug firmware defects, perform root cause analysis, and collaborate with cross-functional teams to ensure release and manufacturing readiness.
Top Skills: BiosBmcCC++Firmware DebuggingUefiX86
Reposted 7 Days AgoSaved
In-Office
Austin, TX, USA
Senior level
Senior level
Hardware
Lead FPGA design, implementation, verification readiness, and hardware bring-up for complex server, storage, networking, and AI infrastructure platforms. Provide technical ownership of FPGA architecture and RTL, lead lab debug and validation using lab equipment, resolve cross-domain integration issues, manage schedules and risks, mentor junior engineers, and communicate technical direction to stakeholders.
Top Skills: Amd/XilinxBiosBmcConstraintsDigital OscilloscopesEthernetFpgaFunction GeneratorsHardware ValidationI2CIntel/AlteraJesdLab-Based DebugLogic AnalyzersPcieRtlSimulationSpiSynthesisTiming AnalysisUart
Reposted 7 Days AgoSaved
In-Office
Oak Hill, Austin, TX, USA
Senior level
Senior level
Automotive • Internet of Things • Mobile • Semiconductor • Industrial
Design and deliver digital IP (RTL) for SoC components using Verilog/SystemVerilog; plan documentation and schedules; collaborate with verification to achieve full coverage; perform quality checks (Lint, CDC, STA); track metrics and support SoC integration, validation, and field issue resolution.
Top Skills: Arm AmbaCClock Domain Crossing (Cdc) AnalysisDdrDisplay ControllerEmulationHigh-Speed Serial LinksInterconnectIso26262LintMemory ControllersPerlPythonRtlSocStatic Timing Analysis (Sta)SystemverilogVerilog
Reposted 7 Days AgoSaved
In-Office
Carlsbad, CA, USA
78K-90K Annually
Junior
78K-90K Annually
Junior
Healthtech • Other • Biotech
The Design Engineer collaborates with teams to develop and modify designs for spine implants, utilizing CAD software and ensuring compliance with quality standards. Responsibilities include testing, documentation, and cross-functional team collaboration.
Top Skills: CreoMS OfficePro-ESolidworks
Reposted 7 Days AgoSaved
In-Office
Milpitas, CA, USA
160K-271K Annually
Mid level
160K-271K Annually
Mid level
Hardware
The System Design Engineer will develop next-gen systems, lead designs, evaluate concepts, troubleshoot complex issues, and collaborate globally to implement solutions.
Top Skills: Complex Custom SoftwareFirmware PackagesImage AcquisitionParticle Control SystemsPrecision Motion ControlTime Delay Integration Cameras
Reposted 7 Days AgoSaved
In-Office
Milpitas, CA, USA
141K-240K Annually
Senior level
141K-240K Annually
Senior level
Hardware
The Sr. FPGA Engineer designs and implements FPGA and firmware for E-beam inspection systems, collaborates with teams on performance specifications, and maintains technical documentation.
Top Skills: 10GAuroraDdr4Embedded LinuxFpgaI2CIntel/AlteraModelsimPcieSpiSystem VerilogVcsVerilogVivadoXilinx
Reposted 7 Days AgoSaved
In-Office
Santa Clara, CA, USA
Senior level
Senior level
Robotics • Defense
Lead FPGA architecture, RTL design, simulation, verification, and hardware bring-up for embedded products. Drive board-level design, PCBA integration, high-speed interface and signal integrity work. Collaborate cross-functionally through prototype, validation, and production ramp while developing test procedures and documentation.
Top Skills: AltiumAmd/XilinxCadence AllegroCanDdrDspEmc/EmiEthernetFpgaI2CIntel/AlteraLatticeMicrochipOrcadPcbPcbaPcieSignal IntegritySoc FpgaSpiSystemverilogUartUsbVerilogVhdl
Reposted 7 Days AgoSaved
In-Office
Raymond, OH, USA
Senior level
Senior level
3D Printing • Design
Lead design and development of automotive interior components (especially center consoles) using CATIA, manage part/process development, coordinate offshore teams, mentor associates, perform feasibility/layout reviews, create drawings/specs, apply DFMEA/GD&T/DFM, support project scoping/scheduling/quoting, and seek efficiency and cost reductions.
Top Skills: CaeCatia V5Catia V6DfmDfmeaGd&TMS Office
Reposted 7 Days AgoSaved
In-Office
Santa Clara, CA, USA
128K-191K Annually
Senior level
128K-191K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Responsible for designing validation boards, analyzing user requirements, PCB layout, and supporting customer designs with technical reports and application notes.
Top Skills: Aec MsasElectrical Engineering PrinciplesIeee 802.3Mixed-Signal DesignPcb LayoutPower IntegritySignal Integrity
Reposted 7 Days AgoSaved
In-Office
Santa Clara, CA, USA
182K-273K Annually
Senior level
182K-273K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The role involves designing and implementing micro-architecture for mixed signal ICs, supervising design engineers, and ensuring high performance in digital signal processing for data centers.
Top Skills: Low Power DesignPerlPythonSpyglassStaSynthesisSystemverilogVerilog
Reposted 7 Days AgoSaved
Hybrid
Chandler, AZ, USA
Senior level
Senior level
3D Printing
Design and verify CMOS analog blocks and subsystems for mixed-signal ASICs, from specification through silicon validation and production ramp. Lead subsystem technical ownership, collaborate with layout, DFT, test and product teams, perform silicon debugging and characterization, and mentor junior engineers while ensuring schedules, performance, power, and area targets are met.
Top Skills: Analog Mixed-Signal VerificationCadenceCmos Analog CircuitsDesign For Test (Dft)Eda ToolsLdosLnaOscillatorsPllRf Mixers
Reposted 7 Days AgoSaved
Hybrid
Chandler, AZ, USA
Senior level
Senior level
3D Printing
Lead design of complex PMICs: translate requirements into architectures, drive circuit design, simulation, verification, and layout, supervise lab evaluation and production ramp, mentor engineers, support DFT and customer technical discussions.
Top Skills: CmosDesign-For-TestLab EvaluationLayoutMixed-Signal Ic DesignPmicPower Management IcsSimulationVerification
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Reposted 7 Days AgoSaved
In-Office
Pearl, MS, USA
5-5 Annually
Senior level
5-5 Annually
Senior level
Industrial • Manufacturing
The Product Design Engineer is responsible for designing, developing, and supporting RF coaxial cable, telecom, and fiber products, ensuring they meet performance and compliance standards, while managing engineering efforts and supporting customer interactions.
Top Skills: Fiber ProductsLab And Simulation SoftwareRf Coaxial CableTelecom Products
Reposted 7 Days AgoSaved
In-Office
Rancho Cordova, CA, USA
105K-165K Annually
Senior level
105K-165K Annually
Senior level
Information Technology • Industrial • Manufacturing
Design, architect, and verify logic and circuit blocks for 3D NAND flash. Implement RTL in SystemVerilog, run synthesis, STA, ECOs, and sign-off. Develop microcode algorithms, collaborate on verification with SVAs, RTL and GLS regressions, review AMS/post-silicon data, define RWB features and DFT, and support post-silicon debug and failure analysis.
Top Skills: Ams SimulationCdc/Rdc AnalysisCompilersDesign For Testability (Dft)EcoGate-Level Simulation (Gls)Lint ToolsLogic SynthesisMicrocodeMicroprobe Waveform AnalysisRtlStatic Timing Analysis (Sta)SystemverilogSystemverilog Assertions (Sva)Timing ConstraintsVerilog
Reposted 7 Days AgoSaved
In-Office
Austin, TX, USA
Senior level
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Design-for-Test (DFT) engineer responsible for scan chain and compression insertion, MBIST/LBIST, ATPG pattern generation and verification, debugging failures, verifying ATPG testbenches, and collaborating across architecture, design, and customer teams. Work with JTAG/IEEE test standards and Cadence flows to meet test coverage and quality metrics.
Top Skills: AsicAtpgCadenceCompression ScanDftEquivalency CheckingIeee1500Ieee1687Jtag 1149.1Jtag 1149.6LbistMbistScan Chain InsertionSocSynthesis ToolsTiming AnalysisVerilog
Reposted 7 Days AgoSaved
In-Office
San Jose, CA, USA
154K-286K Annually
Senior level
154K-286K Annually
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The role involves designing and testing mixed-signal circuits, contributing to project leadership, and collaborating with the digital team on functional closure.
Top Skills: CCadence Analog Design EnvironmentMatlabMixed-Signal Circuit DesignPerlPythonSystemverilogVeriloga
Reposted 7 Days AgoSaved
In-Office
Indian Head, MD, USA
100K-180K Annually
Senior level
100K-180K Annually
Senior level
Professional Services • Consulting
Develop mechanical designs for renovations at a federal site, prepare technical reports, and ensure compliance with codes and standards.
Top Skills: AutocadEngineering ComplianceHvac Design
Reposted 7 Days AgoSaved
In-Office
Mobile, AL, USA
Senior level
Senior level
Aerospace
The Design Engineer develops and customizes aircraft cabin and cargo interiors, performing engineering design from conceptual phases to final installation and supporting airline operations.
Top Skills: AnalysisComputer ApplicationsEngineering DesignIntegrationTechnical Documentation
Reposted 7 Days AgoSaved
In-Office
San Jose, CA, USA
150K-200K Annually
Senior level
150K-200K Annually
Senior level
Artificial Intelligence • Hardware • Security
The Senior FPGA Design Engineer will engage in RTL design, FPGA simulation, system validation, and debug, collaborating with several teams in a fast-paced environment.
Top Skills: EspiEthernetFpgaLtpiPcieProtocompilerRtlSgpioSpiUsbVivado
Reposted 7 Days AgoSaved
In-Office
San Jose, CA, USA
150K-275K Annually
Senior level
150K-275K Annually
Senior level
Artificial Intelligence • Hardware • Software
The RTL Design Engineer will develop design verification strategies for ASIC designs, ensuring efficiency and performance of AI chips.
Top Skills: Digital LogicEthernetHbmPciePythonRtl Design
Reposted 7 Days AgoSaved
In-Office
3 Locations
100K-500K Annually
Mid level
100K-500K Annually
Mid level
Hardware • Manufacturing
The AI Subsystems Physical Design Lead is responsible for timing for subsystems in an AI chip, collaborating with RTL designers, and involved in synthesis, place and route, timing analysis, and power optimization.
Top Skills: InnovusPerlPrimetimePythonRedhawkRisc-VTcl
Reposted 7 Days AgoSaved
In-Office
3 Locations
100K-500K Annually
Mid level
100K-500K Annually
Mid level
Hardware • Manufacturing
The Physical Design Engineer will implement high-performance blocks for CPUs and AI/ML architectures, overseeing the entire flow from synthesis to tapeout and collaborating closely with teams to optimize performance, power, and area.
Top Skills: FusioncompilerPerlPrimetimePythonRedhawkTcl
8 Days AgoSaved
In-Office
City of Palm Coast, FL, USA
Mid level
Mid level
Aerospace
Design and release tooling, fixtures, handling equipment, and Ground Support Equipment for lunar vehicle hardware. Collaborate with cross-functional teams to define requirements, validate manufacturing approaches, support builds, perform producibility assessments, and maintain configuration-controlled engineering documentation while ensuring safety, quality, and regulatory compliance.
Top Skills: 3D CadAnsysCatiaCreoFeaGd&TIssue-Tracking ToolsMS OfficeModel-Based Definition (Mbd)NxWindchill
8 Days AgoSaved
In-Office
Aurora, CO, USA
114K-213K Annually
Senior level
114K-213K Annually
Senior level
Aerospace • Logistics • Security • Software • Cybersecurity
Design, integrate, troubleshoot, and maintain end-to-end RF and antenna systems including software-defined radios and modems. Collaborate with network engineers and software developers to ensure networked RF performance, run simulations and testing, document designs, support virtualized environments, and perform off-shift or mission-driven operations with travel as needed.
Top Skills: Antenna SystemsIp NetworkingLinuxModemsNetwork Monitoring ToolsRf Simulation ToolsRf Test EquipmentRoutersRouting ProtocolsSoftware-Defined RadiosStkSwitchesVirtual Machines
8 Days AgoSaved
In-Office
Buffalo, NY, USA
124K-154K Annually
Senior level
124K-154K Annually
Senior level
Energy • Defense • Industrial • Manufacturing
Lead electrical design and technical execution for modular infrastructure projects from concept to production. Develop electrical architectures, single-line diagrams, schematics, panel layouts, and calculations. Integrate power equipment (generators, switchgear, transformers, batteries, UPS, PLCs), ensure code and UL compliance, support prototyping, FAT, commissioning, and manufacturing, and provide cross-functional technical leadership and continuous improvement.
Top Skills: BatteriesBattery Energy Storage Systems (Bess)GeneratorsIeeeInstrumentationMonitoring SystemsNecNfpaPlcsProtection SystemsSwitchgearTransformersUlUps Systems
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