Top Design Engineer Jobs

Design mechanical valvetrain and engine components using SolidWorks, create and maintain 3D models and engineering drawings, apply GD&T and tolerance analyses, and support manufacturing. Evaluate fitment, machining processes, FEA, CFD, metrology, CMM output, and 3D scanning. Collaborate with product management, supply chain, manufacturing, sales, and marketing to resolve design issues and deliver quality products on schedule.

Leads company-wide workload and performance analysis, AI workload optimization, hardware/software co-design, and advanced SoC architecture methodologies. Defines strategic roadmaps, guides complex IP and subsystem development, establishes modeling and verification practices, and drives performance and power tradeoffs. Partners with product, platform, and executive teams while building engineering organizations and mentoring senior technical leaders. Requires deep semiconductor and SoC development expertise, advanced performance modeling experience, and a graduate degree in a relevant technical discipline.

Design and release exterior automotive lighting systems from concept through mass production. Responsibilities include CAD modeling, design optimization, requirements definition, DVP&R testing, failure analysis, regulatory compliance, engineering changes, supplier coordination, DFMEA/PFMEA, manufacturing pilot support, cost reduction, and cross-functional collaboration with optical, electrical, quality, purchasing, and manufacturing teams.

Designs, builds, documents, tests, and commissions electrical ground support equipment for Blue Origin’s lunar lander program. Responsibilities include circuit and interconnection design, sensor and data acquisition integration, requirements and interface documentation, vendor hardware procurement, test planning, verification, troubleshooting, and coordination with software, systems, test, and flight hardware engineers. The role supports vehicle integration, launch operations, offsite test campaigns, rotating shifts, and occasional travel.

Designs and develops RTL for processor-based ASIC and embedded controller products. Responsibilities include design entry, simulation, synthesis, formal verification, timing closure, cross-domain clocking analysis, FPGA emulation, and test-vector generation. The engineer designs complex state machines and datapath logic while collaborating with an ASIC design team and learning full SoC methodologies.

Electrical Engineering Intern supporting ABB operations through engineering design modifications, drawings, calculations, design reviews, documentation, version control, and continuous improvement projects. The intern will collaborate with cross-functional teams, participate in meetings and brainstorming sessions, apply customer and product insights, manage multiple deadlines, and develop practical engineering skills under manager and team guidance. The role is onsite/hybrid in Fort Smith, Arkansas.

Mechanical Design Engineer Intern supporting engineering design modifications, drawings, calculations, documentation, version control, and continuous improvement projects. The intern will collaborate across teams, participate in meetings and brainstorming, apply standard engineering tools, coordinate project tasks, and develop solutions aligned with customer needs. This onsite/hybrid role is based in Fort Smith, Arkansas, and provides practical experience under the guidance of an Engineering Manager.

Designs analog integrated circuits at Cadence. The provided description contains no further responsibilities, qualifications, or project details beyond the role title and compensation information.

Designs, simulates, and optimizes digital, analog, and DRAM memory circuits for advanced HBM products. Responsibilities include CMOS circuit design, floorplanning, layout leadership, power and timing optimization, simulation using FINESIM, HSPICE, and Verilog, tape-out validation, silicon correlation, documentation, and cross-functional technical leadership across global engineering and manufacturing teams.

Design and implement synthesizable SystemVerilog RTL for HBM base-die digital subsystems, including microarchitecture, registers, clock/reset interfaces, multi-channel logic, DFT, and telemetry. Collaborate with verification, physical-layer, DFT, and test teams on coverage, CDC/RDC analysis, timing and power objectives, integration, ECOs, silicon bring-up, and post-silicon debugging. Apply AI-enabled tools to improve engineering productivity and data-driven analysis.

Designs and analyzes tooling, fixtures, custom machines, test equipment, and manufacturing systems for rocket hardware. Responsibilities include applying mechanical design and analysis principles, creating ASME Y14.5-compliant drawings, collaborating with engineering and manufacturing teams, and managing tooling projects from vendor selection through commissioning. The role also oversees schedules, budgets, fabrication, inspection, installation, and proof testing while ensuring safety, quality, cost, reliability, and maintainability objectives.

Designs complex PCB and flex-circuit layouts, stack-ups, drawings, libraries, and manufacturing data using CAD tools. Collaborates with electrical and mechanical engineers on placement, routing, signal integrity, manufacturability, and mechanical fit. Supports component selection, supplier technical queries, PLM reviews, engineering changes, and PCB design workflow improvements while leading design reviews across programs.

Lead front-end digital design for high-performance switch ASICs, translating microarchitecture into RTL and owning blocks through synthesis, timing closure, verification, DFT, physical implementation, and GDS delivery. Partner with cross-functional teams on high-speed connectivity protocols, silicon bring-up, lab debugging, and root-cause analysis. Provide technical leadership across complex SoC projects supporting AI infrastructure, networking, server, and storage applications.

Lead the design and implementation of debug, trace, and profiling hardware within SiFive's RISC-V ecosystem, focusing on quick market delivery and high performance.

Design Verification Engineer responsible for planning and executing verification of complex silicon IP, developing SystemVerilog/UVM or formal verification environments, creating tests, analyzing failures, and closing functional coverage. The role collaborates with architecture, design, firmware, and verification teams through tape-out and chip bring-up, including test firmware development and validation methodology improvements.

Design and develop electric forklift powertrain systems and components, validating performance, durability, strength, safety, manufacturability, and cost. Responsibilities include managing development schedules, analyzing FEA results, defining prototype tests, coordinating control-system specifications, maintaining CAD and PLM revisions, reviewing drawings, preparing supplier specifications, and managing engineering documentation. The role requires cross-functional collaboration and hands-on product development experience.

Designs and develops hydraulic, pneumatic, electro-mechanical, and servo-mechanism test equipment for military, commercial, and space vehicle products. Responsibilities include creating schematics, integrating components, supporting assembly and testing, conducting research and experimental validation, documenting engineering changes and test results, estimating development work, and mentoring junior engineers. The role is onsite in Buffalo, NY or Arvada, CO and requires collaboration with technicians and internal customers.

Designs moderate to highly complex printed wiring board layouts from schematics and engineering inputs. Supports electrical hardware design, constraint editing, documentation, manufacturability requirements, fabrication criteria, and advanced packaging layouts. Collaborates with engineers, DFM specialists, and senior technical staff while communicating project status and resolving conflicting requirements. Requires extensive PWB design experience, specialized ECAD tools, knowledge of fabrication and assembly standards, and eligibility to obtain and maintain a U.S. government security clearance.

Performs CPU physical design from RTL to GDS, including synthesis, floorplanning, place and route, timing and power analysis, physical verification, and design closure. The engineer debugs timing, power, and design-rule violations, supports PPA optimization, develops TCL and scripting automation, and collaborates with RTL, verification, clocking, and full-chip teams on advanced semiconductor designs.

The job description provides no responsibilities or qualification details beyond the title. The role is identified as a senior-level analog design engineering position.

Designs low-voltage telecommunications and inside-plant infrastructure for commercial, industrial, and military facilities. Responsibilities include structured cabling, voice and data systems, communications room layouts, construction specifications, technical drawings, site surveys, budget estimates, contractor coordination, and operational testing. The role also requires coordinating with engineering and architectural teams, supporting installation and break-fix activities, and ensuring compliance with telecommunications, building, and industry standards.

Designs low-voltage telecommunications and inside-plant infrastructure for commercial, industrial, and military facilities. Responsibilities include structured cabling, voice and data systems, communications room layouts, construction specifications, drawings, site surveys, technical estimates, contractor coordination, and operational testing. The engineer collaborates with architectural and engineering teams, maintains design libraries, and supports cable infrastructure break-fix activities while ensuring compliance with BICSI, NEC, IEEE, EIA, TIA, and related standards.

Verifies custom silicon IP and subsystem designs using UVM-based or formal verification environments. Develops test plans, simulations, random stimulus, coverage-based tests, checkers, and debugging workflows to identify defects and achieve coverage signoff. Improves verification methodologies and tools, applies generative AI, and collaborates with partner teams while mentoring others.

Develop and optimize analog and digital circuit simulation and verification flows for memory design teams. Build scalable software systems, integrate EDA tools, improve design productivity, and reduce pre-silicon failures. Lead AI-assisted and automated simulation workflows, troubleshoot complex circuit issues, collaborate with global engineering teams and EDA vendors, and provide technical guidance to junior engineers.

Develop and execute verification strategies and test plans for IP designs. Debug and resolve design issues, collaborate with architecture, design, and validation teams, document test results, and automate verification processes to improve quality and efficiency.