Top Design Engineer Jobs

Reposted 7 Days AgoSaved
In-Office
Santa Clara, CA, USA
116K-190K Annually
Entry level
116K-190K Annually
Entry level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Design and characterize standard cell libraries for cutting-edge processors using deep-submicron processes. Run SPICE simulations, generate timing/power/noise/OCV views, develop/support automation tools (Perl/Python), collaborate with cross-functional teams, validate data, and improve QA and signoff flows.
Top Skills: Liberty ModelsMakeNoise AnalysisOcvPerlPower AnalysisPythonSpiceStandard Cell LibrariesTclTiming Analysis
Reposted 7 Days AgoSaved
In-Office
Austin, TX, USA
Mid level
Mid level
Aerospace • Other
Develop next-gen ASICs for space deployment, perform design implementation, collaborate with teams, and resolve timing/congestion issues in chip development.
Top Skills: AsicCmosEda ToolsFinfetMakefilePerlPhysical DesignPythonRtlTcl
Reposted 7 Days AgoSaved
In-Office
Austin, TX, USA
Senior level
Senior level
Aerospace • Other
Develop next-generation silicon for SpaceX's Starlink initiative, performing physical implementation steps, improving methodologies, and collaborating with design teams.
Top Skills: BashCshEda ToolsMakefilePerlPythonTcl
Reposted 7 Days AgoSaved
In-Office
Santa Clara, CA, USA
100K-190K Annually
Entry level
100K-190K Annually
Entry level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Design and deliver CPU logic units: write high-performance, low-power RTL, perform synthesis and timing closure, collaborate with verification and implementation teams, and assist with timing closure and lab bring-up.
Top Skills: Cache CoherencyCpu MicroarchitectureDftEcoFloor-PlanningLab DebugLogic SynthesisOn-Chip InterconnectsPrototypingRtlTiming AnalysisVerilog
Reposted 7 Days AgoSaved
In-Office or Remote
2 Locations
116K-219K Annually
Senior level
116K-219K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Develop and design innovative circuits in deep submicron technologies, collaborate with teams for performance improvements, mentor junior members, and prototype ideas on test chips.
Top Skills: Deep Submicron TechnologiesDesign-For-Test (Dft)Digital CircuitsLogic SynthesisMakeMixed-Signal AnalogPerlPlace And RouteRtlSpiceTclVerification
Reposted 7 Days AgoSaved
In-Office
3 Locations
136K-265K Annually
Senior level
136K-265K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Responsible for analyzing architectural requirements, delivering high-performance RTL blocks, collaborating with engineers, and assisting in IP solution integration.
Top Skills: EthernetNvlinkPci-ExpressUcie
Reposted 7 Days AgoSaved
Remote
USA
Senior level
Senior level
Software
Own and evolve a production design system in code used across multiple products: tokens, primitives, components, distribution, documentation, and adoption. Ship production UI work, ensure accessibility, enable AI-consumable patterns, partner with designers, instrument metrics, and drive engineering adoption and throughput.
Top Skills: Ai ToolingCode ConnectCSSDesign TokensFigmaMcpReactStorybookTestingVue
Reposted 7 Days AgoSaved
In-Office
Irvine, CA, USA
160K-220K Annually
Senior level
160K-220K Annually
Senior level
Aerospace • Other
The engineer will design ASIC for SpaceX's Starlink, handling synthesis, timing analysis, and collaboration with cross-disciplinary teams for optimization.
Top Skills: AsicBashCmosCshEda ToolsFinfetMakefilePerlPythonRtl2GdsiiTcl
Reposted 7 Days AgoSaved
In-Office
Palo Alto, CA, USA
170K-230K Annually
Senior level
170K-230K Annually
Senior level
Aerospace • Other
As a Senior SOC/ASIC Physical Design Engineer, you will handle physical implementation, collaborate on feasibility studies, resolve design issues, and ensure signoff closures for ASIC designs.
Top Skills: AsicCmosEda ToolsFinfetMakefile)PerlPythonRtl2GdsiiScripting (Csh/BashSocTcl
Reposted 7 Days AgoSaved
In-Office
Santa Clara, CA, USA
136K-219K Annually
Senior level
136K-219K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
As a Senior ASIC Design Engineer, you will design and implement micro-architecture, collaborate with teams, develop RTL designs, and conduct functional verification.
Top Skills: Asic DesignCad ToolsDigital Systems DesignPerlPythonSystem-VerilogVerilogVlsi
Reposted 7 Days AgoSaved
In-Office
Houston, TX, USA
Senior level
Senior level
Aerospace
Design, test, and integrate electrical power storage systems for spaceflight modules, including batteries and related electrical control systems, collaborating with teams and suppliers.
Top Skills: Battery DesignElectrical EngineeringFault ProtectionPower Storage SystemsTest EquipmentVoltage Conversion
Reposted 7 Days AgoSaved
In-Office
Santa Clara, CA, USA
168K-311K Annually
Senior level
168K-311K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Design and implement high-speed SerDes (80Gbps+) from transistor-level architecture through layout, verification, and silicon characterization. Optimize circuits for noise, power, and loop stability in FinFET/deep-submicron CMOS nodes. Collaborate with layout on floorplanning and high-speed routing. Lead post-silicon bring-up, debugging, modeling, and top-level verification of analog and digital blocks.
Top Skills: Cadence VirtuosoDeep-Submicron CmosFinesimFinfetHspiceMonte Carlo SimulationSerdesSpectreXa
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Reposted 7 Days AgoSaved
In-Office
Palo Alto, CA, USA
155K-185K Annually
Mid level
155K-185K Annually
Mid level
Aerospace • Other
As a Physical Design Engineer II, you will develop ACM and physical design flow methodologies, collaborate with teams to resolve design issues, and perform physical implementation steps for ASICs.
Top Skills: BashCmosCshDftEda ToolsFinfetLbistMakefileMbistPerlPythonRtl2GdsiiScanTcl
Reposted 7 Days AgoSaved
In-Office
Austin, TX, USA
116K-219K Annually
Junior
116K-219K Annually
Junior
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Develop and deliver system-level IP and RTL to measure performance on GPUs/SOCs. Create and automate flows, run/debug RTL checks (CDC, clocks, resets, latency), implement RTL features, and collaborate with architects, designers, and software engineers to support projects and performance monitoring.
Top Skills: Dc_ShellDebussyGdbPerlPythonSystemverilogVcsVerilog
Reposted 7 Days AgoSaved
In-Office
2 Locations
196K-311K Annually
Senior level
196K-311K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Lead floorplan design from early architecture through physical implementation for high-performance SoCs/CPUs/GPUs. Collaborate with cross-functional teams to optimize area, power, timing, and interconnect; develop AI-driven workflows and tools; identify technical risks and drive mitigation to meet product goals.
Top Skills: Agentic Ai WorkflowsC++ChipletClock DistributionCpuDftFloorplanningGpuPackagingPerlPlace And RoutePower DistributionPythonReset DistributionSocTiming Closure
Reposted 7 Days AgoSaved
In-Office
Santa Clara, CA, USA
136K-265K Annually
Senior level
136K-265K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
As a Senior SOC Design Engineer, you will integrate IP blocks, develop methodologies, streamline SOC design, and ensure high-quality RTL delivery.
Top Skills: Eda ToolsPerlPythonRtl Design
Reposted 7 Days AgoSaved
In-Office
Redmond, WA, USA
Senior level
Senior level
Information Technology • Consulting
The Software Design Engineer will design software solutions, requiring over 7 years of experience, particularly in JavaScript and related frameworks.
Top Skills: AngularBackboneC#HTMLJavaScriptRazorReactTypescript
Reposted 7 Days AgoSaved
In-Office
Santa Clara, CA, USA
Entry level
Entry level
Information Technology • Consulting
Develop complex software programs and conduct analysis on systems. Create project plans and specifications while determining product requirements and enhancements.
Top Skills: Apis (Rest Or Soap)C#
Reposted 7 Days AgoSaved
In-Office
Eglin Air Force Base, FL, USA
Mid level
Mid level
Aerospace
The Mission Data Engineer role involves conducting research and development for electronic warfare systems, assisting in programming, testing, and data analysis, while collaborating with engineers.
Top Skills: MS OfficeWindows
Reposted 7 Days AgoSaved
Remote
United States
Senior level
Senior level
Computer Vision • Information Technology
Lead PCB/FPC design for consumer electronics: component placement, routing, signal and power integrity analysis, DFM, and producing fabrication/assembly packages. Manage vendors, release designs into PLM, author ECOs, and maintain ECAD libraries.
Top Skills: Agile PlmBlind ViasBomBuried ViasCadenceCadence AllegroDfmEcadEmi/EmcFlexGerberHdiMicroviasOdbPower IntegrityRigidRigid-FlexSignal IntegrityThermal Management
Reposted 7 Days AgoSaved
In-Office
Milpitas, CA, USA
155K-200K Annually
Expert/Leader
155K-200K Annually
Expert/Leader
Information Technology
Lead the design and testing of hardware systems for wireless technology, emphasizing high-speed circuit designs and cross-functional collaboration.
Top Skills: Ddr4EthernetFpgaHigh Speed OscilloscopesPcb DesignPcieRf DesignsSpectrum AnalyzersWireless Hardware
Reposted 7 Days AgoSaved
In-Office
3 Locations
122K-232K Annually
Mid level
122K-232K Annually
Mid level
Artificial Intelligence • Cloud • Information Technology • Software
Develops RTL logic design and simulation for mixed signal IPs. Participates in architecture definition and optimizes designs for performance goals. Ensures correctness of features through verification processes and supports SoC integration.
Top Skills: CdcFront End Design ToolsLintRdcRtl DesignSynthesisSystem VerilogUpfVcsVerdiVerilog
Reposted 7 Days AgoSaved
In-Office
Mountain View, CA, USA
165K-245K Annually
Senior level
165K-245K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Software
Develop high-speed analog transceiver solutions while collaborating with architects and engineers for optical communication systems.
Top Skills: 3D Electro-Magnetic Simulation ToolsCadence Design Environment
Reposted 7 Days AgoSaved
In-Office
2 Locations
230K-270K Annually
Expert/Leader
230K-270K Annually
Expert/Leader
Artificial Intelligence • Hardware • Machine Learning • Software
Lead design of high-speed analog/mixed-signal transceivers for silicon photonics systems. Drive block specifications with cross-functional teams, run post-layout and mixed-signal simulations, validate circuits in lab, define test plans, document designs, and mentor junior engineers.
Top Skills: 3D Em Simulation ToolsCmosFinfetMatlabMzmPythonRing ModulatorsSerdesSilicon PhotonicsSystemverilogTrans-Impedance Amplifier (Tia)Tx DriverVerilogams
Reposted 7 Days AgoSaved
In-Office
Austin, TX, USA
Senior level
Senior level
Hardware
Lead BIOS/UEFI firmware development and platform integration across product platforms. Provide technical ownership for firmware features, debug complex issues, optimize performance, ensure validation and manufacturing readiness, collaborate with cross-functional teams, mentor junior engineers, and communicate technical direction and risks to leadership.
Top Skills: BiosBmcEmbedded FirmwareUefiX86
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