Top Design Engineer Jobs

Reposted 2 Months AgoSaved
In-Office
3 Locations
89K-145K Annually
Senior level
89K-145K Annually
Senior level
Big Data • Fintech • Mobile • Payments • Financial Services • Data Privacy
Design and implement production-grade backend services and platform APIs in Go. Build Kubernetes-native components (controllers, operators, CRDs, webhooks), integrate with CI/CD, observability, and security systems, and apply AI/agentic programming to automate platform workflows and improve developer productivity. Troubleshoot distributed systems and participate in architecture reviews.
Top Skills: Admission WebhooksAksArgo CdClient-GoConsulController-RuntimeCrdDynatraceEksEmbeddingsGithub ActionsGitopsGkeGoGoGrafanaGrpcIamIstioJaegerJenkinsKubebuilderKubernetesLinkerdLlm-Based PlatformsOpenshiftOpentelemetryOperator SdkPkiPrometheusRancherRestSplunkTanzuTektonVaultVector SearchVenafi
Reposted 2 Months AgoSaved
In-Office
Poway, CA, USA
Senior level
Senior level
Information Technology • Professional Services • Software • Consulting
Design and document low-voltage electrical hardware and system-level circuitry for medical equipment. Gather requirements, produce high-level and detailed designs, perform power/analog/digital interface design and simulation, create schematics, support PCB/layout and harness development, and transition designs to production while following regulatory and safety standards.
Top Skills: Altium DesignerArm ProcessorsAutocadCadence Orcad CaptureCanCeCpldDspEmi/EmcEthernetFpgaI2CNecOracle AgilePcb LayoutPic MicrocontrollersPlmPspiceRs232Ul
Reposted 2 Months AgoSaved
In-Office
Menlo Park, CA, USA
Senior level
Senior level
Information Technology • Professional Services • Consulting
Develop and execute FPGA/ASIC RTL verification tests and test plans using SystemVerilog/UVM. Review designs and RTL, analyze failures, write bug reports, and work with IP vendors and design/firmware engineers to resolve issues.
Top Skills: AsicBugzillaDramEthernetFpgaGitMakePciePerlPythonRtlSystemverilogTclUvmVips
Reposted 2 Months AgoSaved
In-Office
San Jose, CA, USA
Senior level
Senior level
Information Technology • Professional Services • Consulting
Develop and extend verification methodology for MAC-layer unit simulations and SoC environments. Architect and implement testbenches, APIs, golden reference models, 802.11 protocol generators/checkers. Define metrics and implement tests for functional correctness, coverage, and performance. Collaborate across teams and use scripting and simulator tools for debug and validation.
Top Skills: 802.11CCadence SimulatorsEthernetLogic SimulatorsMentor ToolsOvmPerlPslPythonSoc VerificationSvaSynopsys SimulatorsSystemverilogTclUvm
Reposted 2 Months AgoSaved
In-Office
Queens, NY, USA
83K-167K Annually
Mid level
83K-167K Annually
Mid level
Industrial
Lead and manage electrical engineering design for NYC public school projects, overseeing teams, ensuring code and FDNY compliance, producing design and construction documents, managing submittals, site observations, stakeholder coordination, and implementing technical standards across program projects.
Top Skills: CommissioningData/TelecommunicationsElectrical Load CalculationsFdny Fire Alarm RequirementsFire Alarm System DesignIp-Based Security Camera SystemsLighting Control SystemsNew York City Building CodeNew York City Electrical CodeNfpa-70 (National Electrical Code)Nyc Energy Conservation Code (2020/2025)Public Address SystemsService Room Layout
Reposted 2 Months AgoSaved
Hybrid
San Francisco, CA, USA
226K-445K Annually
Mid level
226K-445K Annually
Mid level
Artificial Intelligence • Machine Learning • Generative AI
Verify complex hardware systems, including custom IP blocks and SoCs. Develop verification plans, testbenches, and maintain high coverage for reliable silicon.
Top Skills: QuestaSystemverilogUvmVcsVerdi
Reposted 2 Months AgoSaved
Hybrid
Austin, TX, USA
90K-110K Annually
Mid level
90K-110K Annually
Mid level
Energy • Utilities • Renewable Energy
As a Project Engineer, you will lead design efforts for gas distribution and transmission systems, mentoring junior engineers while ensuring compliance and technical accuracy on mid-sized projects.
Top Skills: Gas DistributionGas Transmission SystemsNatural Gas Design
Reposted 2 Months AgoSaved
In-Office
Hawthorne, CA, USA
100K-135K Annually
Junior
100K-135K Annually
Junior
Aerospace • Other
The Design Criteria Engineer will develop design criteria for satellite systems, perform peer reviews, guide engineers, and track hardware readiness for launch. Responsibilities include risk mitigation and configuration management, along with process improvements in satellite design and manufacturing.
Top Skills: Erp SystemsExcelMatlabPythonSQLVisual Basic
Reposted 2 Months AgoSaved
In-Office
2 Locations
Senior level
Senior level
Software
The Staff Design Verification Engineer drives the verification of cache-coherent interconnect subsystems, focusing on CXL protocols and integration, defining verification plans, and improving overall verification quality through collaboration and mentorship.
Top Skills: PythonSystemverilogUvm
Reposted 2 Months AgoSaved
In-Office
4 Locations
Internship
Internship
Software
The intern will join the Design Verification Infrastructure team to develop and maintain the Verification Platform, enhancing design verification technologies through collaboration and software development in Scala and Python.
Top Skills: ChiselCirctEda ToolsPythonScala
Reposted 2 Months AgoSaved
In-Office
3 Locations
125K-291K Annually
Senior level
125K-291K Annually
Senior level
Biotech
The engineer designs analog and mixed-signal chips, manages layout processes, oversees verification plans, and runs complex simulations. Also responsible for guiding junior staff and consulting with users and vendors for alignment on project goals.
Top Skills: CmosFinfetSystemverilogVerilog Ams
Reposted 2 Months AgoSaved
Hybrid
Conshohocken, PA, USA
95K-130K Annually
Mid level
95K-130K Annually
Mid level
Consulting
Provide technical leadership and design oversight for highway engineering projects. Develop design criteria, alignments, pavement, signing, MOT, utility coordination, specifications, quantities, estimates, and 3D models in OpenRoads. Perform technical reviews, coordinate with discipline leads and PMs, contribute to staffing and proposals, prepare technical presentations, and mentor staff to meet client scope, schedule, budget, and quality standards.
Top Skills: AutocadMicrostationOpenroads (Ord)
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Reposted 2 Months AgoSaved
In-Office
3 Locations
129K-207K Annually
Expert/Leader
129K-207K Annually
Expert/Leader
Software • Semiconductor • Manufacturing
Lead constrained-random verification of high-throughput Ethernet ASICs for AI/ML acceleration using SystemVerilog/UVM testbenches, drive coverage closure, run simulations with VCS/Incisive, script automation, collaborate with global design and architecture teams, and provide technical leadership.
Top Skills: IncisivePerlPythonSvaSystem VerilogUvmVcs
Reposted 2 Months AgoSaved
In-Office
3 Locations
100K-500K Annually
Senior level
100K-500K Annually
Senior level
Hardware • Manufacturing
The Physical Design Engineer will lead efforts in solving physical design challenges, improve RTL-to-GDS methodologies, and integrate AI/ML solutions into CAD flows, focusing on performance and runtime improvements.
Top Skills: Ai/MlEda ToolsFusion CompilerGdsPythonPyTorchRtlTclTensorFlow
Reposted 2 Months AgoSaved
In-Office
Mountain View, CA, USA
155K-210K Annually
Senior level
155K-210K Annually
Senior level
Automotive
Manage and drive photonics layout and design automation, leading a team, ensuring quality, and facilitating cross-functional collaboration in a dynamic environment.
Top Skills: Cadence SkillLuceda PhotonicsSynopsys OptocompilerSynopsys Optodesigner
2 Months AgoSaved
In-Office
San Jose, CA, USA
189K-301K Annually
Senior level
189K-301K Annually
Senior level
Semiconductor • Manufacturing
Lead design and standardize EDA design environments, license management, and large-scale compute infrastructure for semiconductor design organizations. Define standards, roadmaps, and processes; optimize EDA license utilization; build and tune IBM LSF (or equivalent) compute farms; operate user login environments and DevOps collaboration platforms; and manage R&D software portfolio, vendor contracts, and technical support.
Top Skills: CadenceConfluenceExceed TurboxFlexlmFlexnetGrid EngineIbm LsfJIRALinuxPerlPythonShellSiemensSlurmSynopsysTclVncX11
2 Months AgoSaved
In-Office
Dallas, TX, USA
Senior level
Senior level
Semiconductor
Lead mixed-signal pre-silicon verification activities: create verification plans, build simulation environments and behavioral models, run automated regressions, analyze results, participate in design reviews, and support post-silicon validation and correlation to ensure first-pass silicon success.
Top Skills: Cadence VirtuosoDesignsyncGitI2CPerlPmbusPythonSkillSpiSvnSystemverilogTclUnix ShellUvmVerilogVerilog-A
2 Months AgoSaved
In-Office
Tucson, AZ, USA
Junior
Junior
Hardware • Semiconductor • Manufacturing
Design and verify mixed-signal current-sensing ICs across the full IC lifecycle: RTL design, synthesis, P&R, timing analysis, test development, mixed-signal verification, automation, and silicon bring-up to ensure first-pass success.
Top Skills: AmsAnalog Block ModelingDmsGates+SdfGlsMixed-Signal VerificationPlace And RouteRtlScan Pattern GenerationSdfSilicon Bring-UpSimulationSynthesisSystemverilogTapeoutTiming AnalysisUvmVerilogVhdl
2 Months AgoSaved
In-Office
2 Locations
91K-232K Annually
Expert/Leader
91K-232K Annually
Expert/Leader
Hardware • Semiconductor
Design, develop, and optimize FPGA fabric architecture (interconnect, routing, logic, memory, clocking) using SPICE and Verilog. Collaborate with architects, verification, layout, timing, and software teams; create schematics, simulation models, documentation, and support silicon validation, verification, and timing characterization.
Top Skills: AsicEda ToolsEm/Ir AnalysisFpgaFull-Custom DesignMixed-Signal DesignMonte Carlo AnalysisOcv TimingParasitic ExtractionScriptingSolidoSpiceTiming CharacterizationVerilog
3 Months AgoSaved
In-Office
New York City, NY, USA
150K-250K Annually
Mid level
150K-250K Annually
Mid level
Consumer Web • eCommerce • Logistics • Software • Transportation • Industrial • Asset Management + Discovery
Build and ship polished production-quality UI (including mobile), craft layouts, typography, responsiveness, motion, and micro-interactions with Tailwind. Contribute components, tokens, and shared UI foundations. Implement interfaces using React, Next.js, and TypeScript, optimizing for performance, accessibility, and maintainability. Raise frontend craft via reviews and critiques while working closely with founders and customers.
Top Skills: CSSNext.JsReactTailwind CssTypescript
Reposted 2 Months AgoSaved
In-Office
Barnstable, MA, USA
90K-150K Annually
Senior level
90K-150K Annually
Senior level
Real Estate • Software
Design and develop digital and analog circuits for mixed-signal embedded systems, focusing on circuits powered from AC mains, ensuring compliance with safety standards and troubleshooting during production.
Top Skills: Ac-Dc Power ConversionEmi FilteringPcb Design ToolsSpice-Based Simulation Tools
2 Months AgoSaved
Hybrid
San Francisco, CA, USA
150K-200K Annually
Senior level
150K-200K Annually
Senior level
Artificial Intelligence • Machine Learning • Real Estate • Software
Apply deep design expertise and BIM execution to independently design and deliver complex building projects. Develop and coordinate multidisciplinary Revit BIM models, evaluate code compliance and constructability, and translate engineering judgment into AI-enabled workflows. Collaborate with AI researchers and engineers to improve model generation, validation, and documentation, and support client engagements.
Top Skills: 3D ReconstructionAi-Assisted DesignBimDigital TwinsDynamoGrasshopperPythonReality CaptureRevitRhino
2 Months AgoSaved
In-Office
San Jose, CA, USA
144K-230K Annually
Senior level
144K-230K Annually
Senior level
Software • Semiconductor • Manufacturing
Develop and implement complex ASIC verification environments and test plans for high-performance network switch ASICs/FPGAs. Collaborate with architects and design teams, perform simulations, and drive verification to closure through tape-out and production-ready delivery.
Top Skills: Asic Design FlowsCC++Deep Sub-Micron TechnologiesEthernetFpgaOopPcieRoutingSwitchingSystemverilogUvmVerilog
Reposted 2 Months AgoSaved
In-Office
Colchester, VT, USA
100K-160K Annually
Senior level
100K-160K Annually
Senior level
Energy • Chemical • Industrial • Manufacturing
Perform non-supervisory engineering for development testing, equipment qualification, factory acceptance testing, and commissioning. Duties include test planning, fixture design, execution, analysis, reporting, vendor test coordination, design support for rotating machinery, stress and vibration analysis, CAD modeling, and mentoring engineers.
Top Skills: AnsysAsme Code Section IiiAsme Code Section ViiiAsme Qme-1CadLabviewMathcadMS OfficeNi DaqSolid ModelingSolidworks
Reposted 2 Months AgoSaved
Remote or Hybrid
2 Locations
Senior level
Senior level
Software
Designs and develops silicon photonics integrated circuits, managing the entire development process, including testing and analysis for cutting-edge photonic devices and systems-on-chip.
Top Skills: C/C++Optical EngineeringOptics Design Tools Like LumericalPythonRf DesignSilicon PhotonicsSpectrum AnalyzersTesting Tools Such As Vnas
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