Top Design Engineer Jobs

As a Principal Mixed Signal Design Engineer, you lead the design of complex mixed-signal integrated circuits, drive architecture decisions, mentor engineers, and influence technology direction at ADI.

Design interposer layouts for high-speed interfaces while collaborating with cross-functional teams. Requires scripting for automation and expertise in 2.5D/3D designs.

The engineer will focus on pre-silicon verification of DFD logic in AI SoCs, developing environments, analyzing coverage gaps, and automating testing flows.

Ensure first silicon delivery for ASICs, develop test benches, and possess experience in hardware verification and scripting languages.

Design, analyze, build, and test gas-turbine components end-to-end. Create CAD and analysis models (CFD/FEA/system), produce manufacturing-ready drawings and GD&T, run hardware tests, instrument test articles, and iterate designs using test data.

Develop and maintain a scalable Verification Platform: extend Chisel/CIRCT, build Scala libraries and Python tools for test harnesses, stimulus, and metadata querying, support end-to-end verification flows, and educate DV teams on best practices.

The Design Verification Engineer will lead SoC verification cycles, utilizing methodologies like UVM/OVM, and contributing to innovative AI architectures.

The Mechanical Engineer focuses on leading spacecraft mechanical design, managing CAD development, and ensuring quality through collaboration with various teams. Responsibilities include overseeing designs, applying engineering principles, creating documentation, and mentoring others.

Design and verify embedded hardware for A8 (or other 64-bit) microprocessors. Perform schematic capture, PCB/board layout, hardware debug, and verification testing. Requires 5+ years digital/embedded design experience. Contract role based in Houston, TX.

Design Verification Engineer responsible for verifying Tensix IP, building reusable SystemVerilog/Python testbenches and DV infrastructure, developing constrained-random and directed tests, closing coverage, debugging RTL/testbench/workload issues, and integrating CI/CD, simulation/emulation, and containerized regression systems. Collaborates with design, firmware, compiler, and architecture teams.

The Staff Engineer will design high-speed interfaces for NVME or Chiplet storage subsystems, oversee multi-functional team efforts, and mentor engineers for silicon success.

Design and develop low-voltage (≤480VAC) PLC control panels, MCCs, and VFD panels. Produce PLC I/O schematics, panel layouts, BOMs, three-line motor diagrams, cable schedules, and construction scopes. Coordinate with clients, contractors, and multidisciplinary teams, support field start-ups and I/O checks, mentor junior engineers, and ensure compliance with NEC, NFPA, and company safety standards.

The Switchgear Design Project Engineer creates and maintains technical drawings for switchgear systems, collaborates with engineers, and ensures compliance with industry standards while troubleshooting design issues.

The Design Verification Engineer will conduct design verification for consumer devices, create automated tests, execute test plans, identify design risks, and communicate project updates.

Lead STA sign-off and timing closure for silicon-photonics ASICs across process nodes. Develop timing constraints, run full-chip STA, automate ECOs with Tempus/PrimeTime, collaborate with RTL/DFT/architecture teams, and document best practices for synthesis through PnR and tapeout signoff.

Produce and modify highway design calculations, technical reports, plans and specifications. Develop conceptual and detailed designs, perform quality control, coordinate with project teams and managers, mentor junior engineers, and use CAD and office software to support project delivery.

The R&D Engineer will verify complex switch designs, create SystemVerilog-based environments, execute test plans, and develop ATE testing vectors and C-based diagnostic tests.

The Engineer - Electric Substation Design is responsible for managing design work and project construction for electric substations, ensuring safety and compliance with corporate procedures while working collaboratively with teams.

Design and execute comprehensive verification plans for custom silicon, developing UVM/SystemVerilog testbenches, reference models, and stimulus. Build scalable automation in Python, integrate VIP, define coverage metrics, debug RTL/testbench/software interactions, and drive verification best practices across teams.

Lead functional verification for mixed-signal ASICs including verification planning, UVM testbench development, constraint-random and directed tests, coverage and failure analysis, digital/mixed-signal modeling, gate simulations, and regression/debug infrastructure.

Lead end-to-end mechanical design for electromechanical production systems: translate requirements into manufacturable designs, perform FEA and hand calculations, prototype and validate, create drawings/BOMs, apply DFM/DFA, and mentor junior engineers while collaborating with electrical, controls, manufacturing, and suppliers.