Top Senior Hardware Engineer Jobs in Baltimore, MD

Owns the hardware lifecycle for GPU and infrastructure assets, including fleet health monitoring, vendor RMA workflows, firmware and BIOS upgrades, burn-in testing, failure investigation, inventory accuracy, capacity planning, spare-parts strategy, runbook creation, and new platform qualification. The role serves as the technical owner of physical compute platforms and supports high-density GPU infrastructure across sites.

The role manages system requirements and hardware design solutions using VHDL, focuses on national defense, and requires TS/SCI clearance.

Validate server hardware components and new platform designs through power, thermal, performance, firmware, and automation testing. Maintain hardware test infrastructure, document technical findings, coordinate with ODM/OEM partners, and collaborate with software teams on BIOS, kernel, and firmware optimization. The role requires expertise in server architectures, validation methodologies, Linux, Python, Bash, Redfish, IPMI, and industry standards including PCIe, NVMe, and DDR.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Lead multiple program teams for communication antenna subsystem integration and test. Perform RF-to-digital subsystem analysis, antenna range integration, performance modeling, test support, data collection/analysis, electrical/mechanical troubleshooting, software scripting for test automation, and technical team leadership. Requires active Secret clearance and US citizenship.

Provide hardware engineering support for SIGINT solutions: analyze and design hardware systems, perform procurement and acceptance testing, deploy and maintain equipment CONUS/OCONUS, conduct site surveys, prepare technical design packages and as-built drawings, train site personnel, and produce installation and test reports.

Lead design, modeling, analysis, and testing of complex high-speed digital and mixed-signal circuit card assemblies. Perform schematic development, component placement, PCB layout/routing, signal and power integrity simulations, and DVT. Debug hardware in lab, coordinate cross-functional activities, and mentor junior designers. Work requires active Secret clearance and close collaboration with electrical, mechanical, manufacturing, and test teams.

The Hardware Engineer will design, prototype, and document electronic components, work with QA, and support sales with technical assistance, focusing on life safety solutions.

Design, develop, and test FPGA-based hardware and software subsystems for RF collection and communications. Implement DSP algorithms in FPGA, perform RTL development and timing closure, optimize resources, integrate FPGA with Linux/C/C++ codebases, and document system-level solutions for mission-critical intelligence applications.

Lead design, development, construction, and testing of FPGA-based hardware and software processing components for RF communication/collection systems. Implement DSP algorithms in FPGA, integrate FPGA with Linux-based codebases, optimize RTL/timing/resources, and document subsystem solutions. Support mission-critical government client onsite.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

Provides technical leadership and customer support for Marvell switching, PHY, and processor SoC products. Architects hardware solutions, investigates and reproduces hardware and software issues, performs schematic reviews, debugs boot sequencing and customer-reported problems, and supports Linux BSPs, U-Boot, device drivers, and board designs. Serves as a liaison among customers, Avnet field applications engineers, and Marvell engineering teams, while delivering training and occasional customer-site support.

Lead design and implementation of DSP algorithms in FPGA hardware, develop RTL with timing closure and resource optimization, integrate FPGA with Linux-based software using C/C++, test RF communication subsystems, and document system-level designs and integrations.

Lead integration and test of digital-RF antenna subsystems in near-field/compact ranges. Develop test automation and analysis tools, troubleshoot RF and digital issues, support requirements verification, reviews, and collaborate with cross-discipline engineering teams to improve hardware and test processes.

Design and implement DSP algorithms in FPGA, integrate FPGA code with existing software, perform FPGA coding using Vivado, work with C/C++ on Linux, and apply signal processing expertise. Must operate on cleared, classified programs.

Design, develop, implement, and test FPGA-based DSP components and integrate them with Linux-based software stacks. Lead technical design, perform FPGA RTL development, timing closure and resource optimization, implement DSP algorithms in hardware, bridge FPGA to software, and produce documentation for RF communication/collection subsystems.

Lead the development of backend systems for emergency alert technology, manage hardware integrations, and mentor a team in a microservices environment.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.