Top Senior Hardware Engineer Jobs in Raleigh, NC

Tests, validates, and troubleshoots next-generation cloud server hardware for performance, power, reliability, and quality. Develops test scripts, documents results, identifies defects, recommends improvements, and resolves hardware issues across engineering and manufacturing environments. Requires hands-on embedded systems debugging, Linux and scripting experience, and knowledge of server architecture, firmware, operating systems, networking, storage, and hardware acceleration technologies.

Architects and validates DC/DC power delivery systems for compute, storage, and AI platforms. Leads multiphase regulator and point-of-load converter design, simulation, integration, testing, bring-up, and troubleshooting. Guides power architecture, component selection, risk mitigation, supplier qualification, and root-cause analysis. Collaborates with ODMs, suppliers, and cross-functional engineering teams while influencing product roadmaps and mentoring engineers.

Designs and validates server subsystems and hardware platforms, ensuring functional specifications, safety, signal integrity, power integrity, and manufacturing requirements are met. Responsibilities include PCB and stackup development, board file analysis, safety compliance, hardware validation, technical documentation, and cross-functional collaboration. The role supports product development from design through qualification and production, using tools such as HFSS, Maxwell, Cadence Concept, and Allegro, along with laboratory validation equipment.

Provides quality assurance and staging services for POS hardware and OEM products. Develops cost-effective quotes, BOMs, engineering changes, routing documents, packaging solutions, and production processes. Reviews customer documentation, validates line build readiness, coordinates pilot runs, approves first article inspections, and supports quality investigations, substitutions, shipping issues, and manufacturing inquiries.

Owns the hardware lifecycle for GPU and infrastructure assets, including fleet health monitoring, vendor RMA workflows, firmware and BIOS upgrades, burn-in testing, failure investigation, inventory accuracy, capacity planning, spare-parts strategy, runbook creation, and new platform qualification. The role serves as the technical owner of physical compute platforms and supports high-density GPU infrastructure across sites.

Validate server hardware components and new platform designs through power, thermal, performance, firmware, and automation testing. Maintain hardware test infrastructure, document technical findings, coordinate with ODM/OEM partners, and collaborate with software teams on BIOS, kernel, and firmware optimization. The role requires expertise in server architectures, validation methodologies, Linux, Python, Bash, Redfish, IPMI, and industry standards including PCIe, NVMe, and DDR.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

Provides technical leadership and customer support for Marvell switching, PHY, and processor SoC products. Architects hardware solutions, investigates and reproduces hardware and software issues, performs schematic reviews, debugs boot sequencing and customer-reported problems, and supports Linux BSPs, U-Boot, device drivers, and board designs. Serves as a liaison among customers, Avnet field applications engineers, and Marvell engineering teams, while delivering training and occasional customer-site support.

Lead SI/PI technical work for next-generation ASIC packaging: define design rules, run pre/post-layout SI/PI simulations, analyze substrate SI/PI, collaborate with layout and system teams, mentor engineers, and drive packaging design and validation for high-performance ASICs.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.