Top Design Engineer Jobs

Lead end-to-end design release and configuration for developmental vehicle platforms and HIL benches. Define hardware architecture and requirements, manage BOMs, procurement, ECNs, documentation, validation, and cross-functional integration. Drive build-readiness, risk mitigation, and handoff to test operations while providing program status to technical leadership.

Responsible for front end design and verification of ASIC design blocks, including architecture definition, logic design, synthesis, and verification through simulation and analysis of timing.

Lead verification of modem PHY IP: define strategies, build block/subsystem verification environments, create testbenches and coverage, correlate RTL with reference models, debug RTL and integration issues, support emulation/FPGA/prototyping and post-silicon debug, and drive regression automation and CI for high-throughput wireless ASIC platforms.

Lead optical design activities: develop and validate optical/electro-optical products, support customers, manage custom projects, standardize procedures, perform risk assessments, mentor staff, and transfer prototypes to production.

Design, validate, and deploy DFT solutions for digital, analog, and photonic ASICs. Develop scalable automated flows, collaborate with RTL and physical-design teams, implement ATPG/MBIST/boundary-scan strategies, support pre-silicon validation and post-silicon bring-up and debug, and optimize test coverage and integration for production products.

Design and deploy chip, module, and system-level DFT solutions for a photonics-based AI platform. Develop and automate DFT methodologies (ATPG, MBIST, boundary-scan), integrate with RTL and physical design, validate pre-silicon implementations, support post-silicon bring-up and debug, and scale test flows for production.

Enable design and test of implantable cardiac devices by supporting EDA tools and emulation (Cadence Palladium/RPP), installing and maintaining hardware and software, debugging compilation/synthesis and emulation issues, automating flows, modeling analog/digital functions for emulation, and delivering training and vendor interfacing to support design teams.

Develop and mature a cryogenic process-design-kit for superconducting quantum hardware. Own model-to-measurement characterization, plan and analyze cryogenic test chips, extend foundry PDKs to low-temperature regimes, partner with foundry and device teams, establish characterization infrastructure, and use EDA/layout/physical-verification toolsets to translate measurements into models, design rules, and documentation for scalable quantum circuit design.

The role involves leading pre-silicon verification of CPU designs, developing verification plans, debugging RTL issues, collaborating with design teams, and documenting results.

Lead Florida drainage discipline, manage/design stormwater and hydraulic systems, oversee permitting and quality control, mentor staff, coordinate with roadway designers, and drive business development for FDOT and municipal clients.

The role involves designing, implementing, and verifying DFT strategies for digital pipelines, collaborating across teams, and mentoring junior engineers.

Define and execute verification plans for block-to-full-chip, build SystemVerilog/UVM testbenches, write assertions, run constrained-random and directed tests, manage regressions and CI, perform coverage closure and debug, support silicon bring-up and post-silicon validation, and collaborate across architecture, RTL, DFT, firmware, and physical design teams.

Lead development and execution of verification plans for block-to-full-chip ASICs. Build SystemVerilog/UVM testbenches, write SVAs, integrate formal methods, run constrained-random and directed tests, manage regressions and CI, perform failure triage and root-cause analysis, ensure coverage closure, support silicon bring-up and post-silicon validation, and drive DV methodology and cross-functional verification efforts.

The role involves crafting high-performance user interfaces for blockchain products, with a focus on design and user experience.

The role involves designing for manufacturing and assembly of electronic parts, leading design reviews, and resolving complex engineering issues in aerospace and defense applications.

Lead SoC-level microarchitecture, top integration, logic design and RTL implementation for memory/storage controllers. Integrate and review 3rd-party IPs (UCIe, DDR, CPU, Ethernet), collaborate with verification and physical design teams on synthesis, timing, DFT, CDC, lint, and silicon bring-up to deliver production-ready silicon.

Assist in design qualification and regulatory compliance throughout product development and manufacturing, ensuring safety and quality standards are met.

As a Project Engineer, you will lead natural gas design projects, mentoring junior engineers, ensuring compliance, and enhancing processes while collaborating with various stakeholders.

Lead design efforts for gas distribution and transmission systems, meter/gate stations, and pipelines. Mentor junior engineers, coordinate design teams, ensure technical accuracy and compliance, review drawings, support quality control and business development, and drive process improvements to deliver safe, efficient projects.

Develop physical design methodologies for graphics processors and SOCs, focusing on innovative solutions to PPA problems and ML-based development.

Develop and improve C++ algorithms and optimization engines for VLSI physical design (sizing, buffering, CTS, legalization, ECO routing). Own discovery through deployment, collaborate with design teams, and optimize for frequency, power, and performance using EDA tools and scripting flows.

Develop and support software tools for chip design and verification, optimize workflows, work collaboratively to create high-performance software.

Drive physical design and timing for high-frequency, low-power CPUs/GPUs/SoCs from RTL to GDS2. Perform synthesis, STA, timing constraint generation, timing convergence, placement/routing optimizations, ECO implementation, DFT closure, and cross-team methodology improvements to achieve timing and power targets.

The Design Verification Engineer will verify functionality of AI SoC, develop UVM Testbench, conduct failure analysis and coverage analysis, and work with engineering teams.

Lead technical team in engineering designs for highway projects, ensuring adherence to schedules, budgets, and quality standards while mentoring junior staff.