Top Design Engineer Jobs

Design and execute comprehensive verification plans for custom silicon, developing UVM/SystemVerilog testbenches, reference models, and stimulus. Build scalable automation in Python, integrate VIP, define coverage metrics, debug RTL/testbench/software interactions, and drive verification best practices across teams.

Lead functional verification for mixed-signal ASICs including verification planning, UVM testbench development, constraint-random and directed tests, coverage and failure analysis, digital/mixed-signal modeling, gate simulations, and regression/debug infrastructure.

The Staff Engineer leads analog and mixed-signal block design, conducts design reviews, mentors junior engineers, and develops methodologies for advanced technology applications.

Design and integrate aircraft fluid subsystems (ECS, LCS, fuel, hydraulics): route tubes/ducts, design secondary structure, apply GD&T, use NX/Teamcenter, verify airworthiness, coordinate stakeholders, and support program reviews.

Design and release exterior mirror components and systems for production vehicles: define functional objectives, lead supplier design and validation (DFMEA, DVP&R), manage CAD/model integrity, support software/hardware releases, perform CAE/packaging, resolve issues (GIMS), and provide in-person test and plant support through launch.

Lead vehicle-level integration and configuration design for prototype aircraft in a rapid-prototyping Special Programs team. Own packaging, cross-discipline interfaces, standards, technical approach, feasibility assessments, documentation, and test/build support. Collaborate across programs, represent work in reviews and with government stakeholders.

Lead sector-wide design quality strategy and governance, drive design reviews, risk management, V&V and CAPA activities, mentor engineers, champion PLM/requirements tools, and promote MBSE, digital-twin and AI defect-prediction initiatives to ensure compliance with aerospace and regulatory quality standards.

Lead physical implementation of complex digital/mixed-signal IC blocks through floorplanning, place-and-route, timing closure, physical verification, and tapeout. Drive timing, congestion, power, area optimizations; develop automation/scripts; collaborate with RTL/STA/DFT/library/package teams; mentor juniors; support integration, signoff, and tapeout planning.

Lead the technical development of mixed-signal IPs for SoC applications, oversee integration, and validate silicon performance while collaborating with cross-functional teams.

Lead end-to-end mechanical design for current and next-generation products. Prototype using welding and machining, create and manage SolidWorks models, drawings, assemblies, BOMs, ECNs, and work instructions. Manage top-level assemblies in a PDM environment, coordinate with suppliers, drive DFM and process improvements, and travel overseas up to 20%.

Lead RF/microwave and antenna subsystem design, integration, testing and troubleshooting. Perform subsystem analysis, requirements verification, hardware integration, test scripting and data reduction. Create test tools (MATLAB/Python), support manufacturing test and lead HW/RF team efforts across AESA antenna subsystems.

Design, integrate, test, and troubleshoot RF/microwave hardware and subsystems including LRMs and CCAs. Perform subsystem analysis, requirements flow-down, verification testing, data reduction, and develop test support tools (MATLAB/Python). Work on integration and HW/SW issues, mentor engineers, and support manufacturing test environments. Position requires an active Secret clearance and U.S. citizenship; 2nd shift schedule with ~10% travel.

Serve as technical lead and solution owner for deployment of body cameras, in‑car video, evidence management, and command center systems. Perform network and infrastructure surveys, design and install wireless/TCP‑IP systems, produce as‑built documentation, run customer discovery and training sessions, and coordinate cross‑functional teams for public safety implementations.

Design realistic chip architecture and RTL, build verification environments and testbenches, evaluate AI-generated hardware solutions, provide technical feedback, and collaborate to improve AI understanding of digital design, verification, and semiconductor workflows. Commit 20–40 hours/week remotely as an independent contractor.

Lead design and develop locomotive cab structures and components, create and evaluate concepts, lead design reviews, produce drawings and documentation, support manufacturing and suppliers, manage projects, perform risk assessments, and develop verification/validation plans to ensure safety, reliability, and manufacturability.

Design and implement board-level manufacturing test hardware and fixtures, define ICT/functional/test/programming/calibration strategies, deploy and sustain test solutions with contract manufacturers, analyze yield and failure trends, and drive DFT and continuous improvements across prototype to high-volume production.

Design, analyze, develop, and validate rocket engine injectors from concept through hotfire and flight. Lead physics-based sizing, manufacturing selection, test campaign planning and execution, hotfire data analysis, and iterative redesign while partnering with vehicle and test-stand engineers.

Design and verify front-end RTL blocks for ASIC cores: define architecture, implement logic, perform synthesis, constraints, simulation and formal verification, analyze timing from physical implementation, debug Verilog designs, and collaborate across global teams within the full ASIC implementation flow.

Lead verification for a scalable cache-coherent interconnect subsystem: define strategy and test plans, build verification environments, checkers, assertions and coverage, verify CHI/ACE/CXL/AXI flows, create constrained-random and directed tests, debug across RTL/formal/software, and drive methodology and mentorship to improve verification quality and closure.

Lead verification for a scalable cache-coherent interconnect subsystem. Define strategy, develop environments, checkers, assertions and coverage, verify CHI/ACE/CXL/AXI flows, debug root causes, partner with architecture/RTL/formal teams, and mentor engineers to improve verification quality and signoff.

The Power Electronics Design and Release Engineer will design power electronics components for electrified vehicles, ensuring compliance with specifications and best practices.

The RTL Design / Microarchitecture Engineer will define and implement microarchitectural components, optimize performance, and collaborate with cross-functional teams.

As a Principal Design Verification Engineer, you will lead verification strategies and teams for complex IPs or full-chip SoCs, ensuring high-quality silicon delivery through comprehensive verification methodologies and cross-functional collaboration.

Manage engineering teams to develop and characterize hardware technologies, resolve complex process issues, validate performance, and support cross-functional integration for advanced semiconductor and display manufacturing solutions.

The role involves assisting in the design of county engineering projects, becoming a Bridge Inspection Team Leader, and solving maintenance issues.