Top Design Engineer Jobs

Designs and verifies image sensor controls, processing functions, and high-speed USB/MIPI interfaces. Performs full-chip integration, verification, chip bring-up, validation, and debugging. Participates in FPGA development and documents architectures, registers, interfaces, and designs. Requires familiarity with Verilog RTL, simulation, synthesis, static timing analysis, and formal verification, plus knowledge of high-performance, low-power design, FPGA platforms, emulation, and SoC architecture.

Design and verify advanced CMOS image sensor analog circuits, including ASRAM and signal-chain building blocks. Perform schematic, layout collaboration, post-layout verification, PVT and Monte Carlo simulation, IR drop and power integrity analysis, and tapeout signoff. Develop Python and Perl automation for simulation and yield analysis. Collaborate across digital, verification, process, and test teams on interface specifications, calibration, silicon bring-up, lab characterization, and performance debugging.

Design and optimize transistor-level analog and mixed-signal circuits for CMOS image sensors. Perform block, transistor-level, and whole-chip simulations; oversee floor planning and layout using Cadence Virtuoso and Calibre. Define sensor readout timing, collaborate with verification, process, test, and applications teams, and debug and characterize fabricated sensors. Research new circuits, develop innovative solutions, and support products from concept through release.

Design and develop CMOS image sensor analog and mixed-signal circuits, including transistor-level schematics, layouts, floorplans, readout circuits, and interfaces. Simulate and verify designs using industry-standard EDA tools, perform DRC, LVS, PERC, and IR-drop checks, and collaborate cross-functionally to debug and optimize fabricated image sensors. Analyze specifications such as speed, noise, linearity, and power while accounting for process variation and operating-condition corners.

Design and integrate RTL digital logic for image sensor and ISP systems. Responsibilities include chip architecture, sensor timing, image data paths, PPA optimization, physical design collaboration, DFT, verification, chip integration, silicon bring-up, debugging, and image quality tuning. The role requires collaboration with analog, digital, algorithm, application, and physical design teams throughout production readiness.

Design transistor-level analog and mixed-signal circuits for CMOS image sensors, conduct block, transistor, and whole-chip simulations, and create optimized layouts using Cadence Virtuoso and Calibre. Collaborate with verification, process, test, and application engineers to debug, characterize, and optimize fabricated sensors, supporting products from concept through release.

Designs and verifies image sensor control and processing functions, high-speed USB and MIPI interfaces, and full-chip SoC integration. Responsibilities include chip bring-up, validation, debugging, FPGA development, and architecture, register, interface, and design documentation. Requires digital design flow experience including Verilog RTL, simulation, synthesis, static timing analysis, and formality, plus knowledge of high-performance, low-power design, FPGA platforms, emulation, and SoC architecture.

Design and integrate digital circuit logic for image sensor and ISP systems. Responsibilities include chip architecture, RTL implementation, ISP data-path integration, PPA optimization, physical design collaboration, verification, chip bring-up, silicon debugging, and image quality tuning. The role works closely with sensor, algorithm, application, and physical design teams to achieve production readiness.

Designs transistor-level analog and mixed-signal circuits for CMOS image sensors, including block and whole-chip simulation, layout optimization, verification, debugging, characterization, and performance improvement. Collaborates with verification, process, test, and applications teams to bring image sensor products from concept through release. Conducts circuit R&D, proposes technical solutions, and guides less experienced engineers.

Optimize pixel structures and semiconductor fabrication processes, develop and validate CIS simulation methodologies, and model devices and systems for imaging and display technologies. The role collaborates with process integration, design, system engineering, and architecture teams to advance pixel architectures, sensors, and displays, including phase detection, dual-pixel detection, near-infrared, time-of-flight, and LCOS applications.

Designs and verifies image sensor processing functions, high-speed USB and MIPI interfaces, and full-chip SoC integrations. Performs chip bring-up, validation, debugging, FPGA development, and architecture and interface documentation. Requires digital design flow experience, including Verilog RTL coding, simulation, synthesis, static timing analysis, and formality. Familiarity with FPGA and emulation platforms, SoC architecture, high-performance and low-power techniques, and formal verification is desired.

Design and deliver advanced aerospace vehicle systems from concept through flight. Own technical projects and subsystems, perform multidisciplinary engineering trades, define requirements and verification plans, lead prototyping and qualification, support manufacturing and suppliers, and participate in testing, mission preparation, flight operations, and post-flight analysis.

Design electrical systems for biopharmaceutical and industrial manufacturing facilities, including lighting, power distribution, UPS, and security integration. Develop calculations, layouts, construction documents, and technical queries; coordinate with multidisciplinary teams; support engineering studies and facility assessments; review shop drawings and submittals; coordinate with vendors; and apply applicable electrical codes, standards, and pharmaceutical facility best practices.

Design complex digital boards using high-end SoC FPGAs, high-speed interfaces, microprocessors, and power supplies. Perform signal and power integrity analysis using simulation tools, support EMC certification, and apply military and space hardware design experience. The role is hybrid in San Diego and offered on a contract-to-potential-permanent basis.

Own end-to-end digital design verification for complex SoCs at block, subsystem, and full-chip levels. Develop UVM/SystemVerilog testbenches, verification plans, constrained-random and directed tests, scoreboards, coverage models, and C/C++ SoC validation libraries. Automate regressions and reporting, debug failures, perform root-cause analysis, and collaborate with architecture, design, and software teams. The role requires managing verification milestones, risks, and deliverables through multiple successful tape-outs.

Lead silicon speed characterization from first power-on to production sign-off. Close correlation gaps between pre-silicon models and measured silicon, trace frequency/timing failures to root causes, drive fixes across teams, and build AI-driven test orchestration and analysis pipelines to expand coverage and reduce cycle time.

Lead design and delivery of SMAC workflow methodology and infrastructure to keep system specifications and manufacturing test specs aligned. Build production-grade Python pipelines, automated checks, CI gates, and agent-ready tooling that detect spec drift pre-silicon. Integrate workflows into program milestones, drive cross-org adoption across design, operations, and DFX, and apply AI where appropriate while ensuring reviewable, auditable artifacts.

Develop, enhance, and maintain SharePoint sites, workflows, forms, templates, branding, permissions, and customizations. Create visually effective digital products, infographics, dashboards, charts, and executive communications. Apply front-end web technologies and SharePoint capabilities to improve usability, accessibility, information sharing, and publishing. Partner with leadership, content owners, and technical stakeholders to gather requirements, standardize designs, troubleshoot issues, and deliver polished mission-focused content.

Design and develop mechanical machine components and assemblies under senior-engineer guidance. Create SolidWorks models and drawings, perform engineering calculations and analyses, maintain design documentation, participate in reviews, research technical solutions, support safety initiatives, and collaborate with vendors and clients. The role includes occasional travel to project sites and opportunities to grow through increasingly responsible machine-design work.

Lead design reviews, validation planning, and bench characterization for infotainment and connectivity ECUs. Test power integrity, high-speed interfaces, RF performance, thermal behavior, protection, fault recovery, and firmware interactions. Develop Python automation, analyze large datasets with AI tools, create DFT reports, investigate failures, and drive cross-functional issues to closure. The role requires extensive laboratory instrumentation experience, electrical and RF fundamentals, and collaboration with design, firmware, reliability, and manufacturing teams.

The Staff Design Engineer will debug silicon issues, collaborate cross-functionally, support design updates, and improve product quality for HBM products.

Drive SoC physical implementation from netlist to GDSII including floorplanning, placement, CTS, routing, timing closure (MMMC), power integrity, and physical signoff. Integrate complex IP, partner with DFT/packaging/manufacturing, support tape-out and post-silicon debug, and improve flows via scripting and automation.

Design, analyze, document, and test mechanical components and systems for advanced nuclear reactor projects. Develop SolidWorks designs and manufacturing drawings, prepare specifications and test procedures, coordinate with multidisciplinary engineering teams, support fabrication and testing, troubleshoot issues, and participate in customer technical discussions. The role requires hands-on problem-solving, cross-functional collaboration, and adaptability to evolving requirements.

Leads end-to-end development of space-rated avionics and power hardware, including requirements, schematic and PCB design, controller algorithms, testing, qualification, production support, and flight integration. Performs power integrity, reliability, radiation, and worst-case analyses; supports hardware validation and defect disposition. Collaborates cross-functionally, reviews designs and documentation, manages product configurations, and mentors junior engineers.

Leads end-to-end design and development of high-reliability spacecraft avionics power components, including requirements, schematics, PCB layout, power integrity, controller algorithms, testing, qualification, production release, and flight support. Collaborates across engineering, production, quality, and customer teams; manages configuration revisions; reviews designs; supports hardware builds; and mentors junior engineers.