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Reposted 24 Days AgoSaved
In-Office
Houston, TX, USA
100K-150K Annually
Senior level
100K-150K Annually
Senior level
Healthtech
The Senior Design Verification Engineer leads design verification for medical devices, collaborates with teams, develops strategies, and executes testing protocols to ensure quality and safety standards.
Top Skills: 21 Cfr 820.30CC#C++GitIec 60601-1Iec 62304Iso 13485Iso 14971JavaPython
25 Days AgoSaved
In-Office
South Burlington, VT, USA
110K-145K Annually
Mid level
110K-145K Annually
Mid level
Transportation
The Composites Design and Manufacturing Engineer will design components for next-gen aircraft, develop tooling, and support first article manufacturing.
Top Skills: CadComposite ToolingMachine Shop ToolsManufacturing Processes
Reposted 25 Days AgoSaved
In-Office
Lafayette, CO, USA
111K-167K Annually
Senior level
111K-167K Annually
Senior level
Healthtech
The role involves development and verification of programmable logic for medical equipment, including FPGA systems and validation processes. Responsibilities include design, testing, and documentation, as well as mentoring lower-level staff and interfacing with various stakeholders.
Top Skills: AdcDacDspFpgaRtlSocUvm
25 Days AgoSaved
In-Office
Westborough, MA, USA
Mid level
Mid level
Semiconductor
Develop and execute verification plans, create testbenches, perform functional and performance verification, and collaborate with teams to resolve issues.
Top Skills: C++PerlPythonSystem VerilogUvmVerilogVhdl
25 Days AgoSaved
In-Office
Menlo Park, CA, USA
147K-170K Annually
Senior level
147K-170K Annually
Senior level
Energy
The Staff Mechanical Engineer will lead the alignment of components in the Linear Generator, involving design, analysis, testing, and collaboration with engineering teams. They will provide guidance to junior engineers and focus on improving engineering processes while supporting the mission for clean energy solutions.
Top Skills: AnsysCadFeaSolidworks
Reposted 25 Days AgoSaved
In-Office
Santa Clara, CA, USA
136K-265K
Senior level
136K-265K
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
This role involves unit and sub-system level verification for innovative IPs in GPUs and SoCs, requiring advanced verification methods and strong debugging skills.
Top Skills: PerlQuestaSvaSystem VerilogTclUvmVcsVerilog
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Reposted 25 Days AgoSaved
In-Office
2 Locations
168K-311K
Senior level
168K-311K
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Develop innovative physical design methodologies for GPU, CPU and SOC implementation, focusing on PPA improvements and advanced technology nodes.
Top Skills: C++PerlPythonTcl
Reposted 25 Days AgoSaved
In-Office
3 Locations
168K-311K
Senior level
168K-311K
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Develop physical design methodologies for graphics processors and SOCs. Responsibilities include chip design, flow and tool methodologies, and back-end verification.
Top Skills: C++Eda ToolsPerlPython
One Month AgoSaved
Hybrid
Los Angeles, CA, USA
200K-275K Annually
Senior level
200K-275K Annually
Senior level
Events • Mobile
As a Senior Frontend Engineer, you will design, develop, and maintain user experiences across platforms, focusing on design systems and mentoring team members.
Top Skills: FigmaReactReact NativeStorybookTypescript
One Month AgoSaved
Hybrid
Aliso Viejo, CA, USA
200K-275K Annually
Senior level
200K-275K Annually
Senior level
Events • Mobile
As a Senior Frontend Engineer, you'll design and develop user experience systems, mentor team members, and ensure code quality.
Top Skills: Ci/CdFigmaReactReact NativeStorybookTypescript
One Month AgoSaved
Hybrid
New York, NY, USA
200K-275K Annually
Senior level
200K-275K Annually
Senior level
Events • Mobile
As a Senior Frontend Engineer, you will design, develop, and maintain design systems and reusable components while mentoring team members and collaborating with designers and engineers.
Top Skills: FigmaReactReact NativeStorybookTypescript
2 Months AgoSaved
In-Office
Marina del Rey, CA, USA
133K-180K Annually
Senior level
133K-180K Annually
Senior level
Edtech
The Analog Design & Layout Engineer will support customers in analog circuit design and layout, assist with educational classes, and engage in funded research projects at USC.
Top Skills: Cadence VirtuosoMentor Graphics ToolsSpice Simulators
4 Months AgoSaved
In-Office
Arlington, VA, USA
107K-140K Annually
Mid level
107K-140K Annually
Mid level
Edtech
The ASIC/FPGA Research Engineer will engage in digital hardware design, work with advanced prototypes, and support research efforts within a collaborative team setting.
Top Skills: C++GoLinuxPythonVerilogVhdl
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