Top Design Engineer Jobs

Develop, integrate, test, and maintain mission design and simulation software for NASA and commercial spaceflight programs. Implement software enhancements, maintain Class C software per standards, write documentation, support CI/CD and lifecycle activities, enforce coding standards, and collaborate with NASA teams to improve software design and processes.

Design and verify RTL for digital blocks targeting ASIC implementation. Develop UVM/SystemVerilog testbenches, constrained-random and directed tests, and automation scripts (Python/TCL). Apply AI/ML techniques to improve verification closure and coverage. Collaborate with cross-functional teams, perform lint/CDC/synthesis checks, and participate in design reviews and documentation.

Support roadway design under mentorship: prepare 3D models and construction plans, perform quantity and design calculations, site visits, drainage/utility coordination, and adhere to design standards and quality control.

Lead electrical design for high-reliability avionics used in rocket engines, including analog instrumentation, actuator circuits, PCB development, prototyping, verification, FMECA/DFx, test troubleshooting, schedule management, and presenting program status. Mentor engineers and ensure designs meet safety-critical and space-environment requirements.

The Verification Engineer will oversee aeromechanical subsystem verification, translating methods into tests, designing test fixtures, executing tests, analyzing data, and producing reports.

The Staff Design Assurance Engineer ensures effective risk management and quality assurance in product development, focusing on compliance with medical device regulations.

The Project Engineer will design drainage elements for multimodal transportation projects, oversee plans and documents, ensure quality work, and mentor junior staff.

The Project Engineer will lead hydraulic design projects, manage schedules, ensure quality deliverables, and mentor junior staff in civil engineering practices related to transportation and drainage.

The Project Engineer will design hydraulic systems for transportation projects, ensuring quality deliverables, coordinating with teams, supervising juniors, and engaging in business development activities.

The Physical Design Engineer will implement complex mixed signal designs, optimize floorplans, perform timing analysis, and collaborate with cross-functional teams.

Participate in product development, support new designs, provide technical support during launches, and resolve quality issues for air compressors.

Lead end-to-end silicon diagnostic pipeline using AI/ML to analyze scan failures and process data, build models for failure classification and predictive yield, orchestrate AI-based EDA tools, and drive cross-functional root-cause analysis to improve yield and time-to-market.

Lead end-to-end mechanical design for electromechanical production systems: translate requirements into manufacturable designs, perform FEA and hand calculations, prototype and validate, create drawings/BOMs, apply DFM/DFA, and mentor junior engineers while collaborating with electrical, controls, manufacturing, and suppliers.

Develop and maintain UVM/SystemVerilog SoC-level verification environments, create test plans and tests to meet coverage goals, debug failures with designers, and mentor junior engineers. Work involves verification tool usage, regression setup, and scripting for automation.

Perform physical design and timing analysis for GPUs, CPUs, DPUs and SoCs across block, cluster, and full-chip levels. Drive frontend/backend implementation including synthesis, equivalence checking, floorplanning, timing constraints, STA-based timing convergence, power convergence, and ECO implementation while collaborating cross-functionally.

Lead end-to-end verification of PCIe/CXL subsystems: define verification plans, build scalable UVM/SystemVerilog testbenches, integrate VIPs, create constrained-random and directed tests, implement SVA, drive coverage closure, debug protocol and coherency issues, measure performance, automate regressions, and collaborate with design, firmware, and validation teams while mentoring junior engineers.

Design and deliver high-quality SystemVerilog RTL for advanced-node SoCs (5nm and below). Optimize PPA, perform CDC/RDC analysis and low-power design, drive timing closure and physical-design handoff, and collaborate with Architecture, Verification, and Physical Design teams. Work spans specification through tapeout readiness.

Design and integrate spacecraft mechanical systems including architecture/layouts, structures, thermal and electrical interfaces; perform CAD modeling, drawing release, integration support, testing, and program milestone support.

Lead reliability and design reviews for human-rated artificial-gravity space station systems. Oversee qualification and test completeness, drive engineering standards and processes, capture lessons learned, and partner cross-functionally to ensure design maturity, configuration control, and safe, resilient hardware development.

Drive digital and analog verification for mixed-signal sensor chips: develop verification/test plans, create SystemVerilog chip-level testcases and behavioral analog models, run simulations/regressions, debug, close verification metrics, implement DFT/ATPG/BIST strategies, and collaborate with design and systems teams to resolve spec gaps and mitigate risks.

Design, develop, integrate, test, and sustain RF/electrical systems and components. Create schematics/BOMs, build prototypes, run lab simulations, author interface documents, support design reviews, and lead technical execution.

Design-for-test (DFT) lead for 3nm/5nm networking SoCs: implement scan insertion, ATPG (compressed/uncompressed), MBIST and JTAG insertion/verification, run RTL checks, pattern simulation and silicon bring-up; debug mismatches and automate/optimize DFT flow using scripts and Makefile enhancements.

Lead development and execution of IP- and system-level verification plans using UVM/SystemVerilog and emulation platforms. Build and maintain testbenches, run constrained-random and directed tests, debug via simulation and emulation tools, develop SVA, drive coverage closure, support early software bring-up, and improve verification flows and infrastructure.

Verify digital hardware designs by developing testbenches, writing test plans, debugging failures, and improving verification methodologies. Collaborate with engineers to apply simulation, assertions, coverage, and automation to ensure design correctness in semiconductor or systems projects.

Develop and verify designs for AI processors, focusing on system-level verification, testbench development, and collaboration with RTL designers.