Top Senior Hardware Engineer Jobs in Portland, OR

Leads enterprise HDD qualification for Azure-scale deployments, translating requirements into validation strategies and automated test suites. Analyzes failures using traces, logs, telemetry, and diagnostics; partners with suppliers on debugging and corrective actions; drives reliability, security, performance, interoperability, and serviceability improvements. Coordinates cross-functional technical initiatives, advances qualification methodologies, influences industry standards, and mentors engineers.

Maintains and troubleshoots server, storage, networking, cabling, and power hardware across a large-scale production data center fleet. Writes Python automation scripts, reviews logs and alerts, performs diagnostics, supports deployments, builds hardware health dashboards, coordinates with DevOps, supply chain, and vendors, and assists with hardware evaluation and reliability improvements. Requires on-call availability and travel to data center sites.

Designs and validates electrical and electronic components, subsystems, integrated circuitry, and hardware solutions. Develops test plans covering tolerances, form, fit, function, shock, vibration, EMI, safety, reliability, thermal performance, and power. Performs feasibility, margin, validation, modeling, and empirical analyses; collaborates with internal and outsourced engineering partners; evaluates production reliability and supports prototype fabrication for reliable, cost-effective products.

Leads storage hardware qualification and validation for Microsoft Azure data centers. Responsibilities include developing qualification frameworks, reliability and telemetry strategies, debugging complex hardware, firmware, operating system, driver, and cloud-service issues, and coordinating with OEMs, ODMs, and silicon partners. The role drives production readiness, root-cause investigations, automation, technical reviews, and continuous process improvement while providing technical leadership to team members.

Tests, validates, and troubleshoots next-generation cloud server hardware for performance, power, reliability, and quality. Develops test scripts, documents results, identifies defects, recommends improvements, and resolves hardware issues across engineering and manufacturing environments. Requires hands-on embedded systems debugging, Linux and scripting experience, and knowledge of server architecture, firmware, operating systems, networking, storage, and hardware acceleration technologies.

Lead architecture, bring-up, validation, optimization, and deployment of networking infrastructure for large-scale AI training and inference. Define networking requirements, design Layer 3/4 and RDMA/AI fabric solutions, develop validation and observability tooling, perform packet-level debugging and root-cause analysis, and collaborate across silicon, firmware, software, and Azure teams to ensure performance, scalability, and reliability of hyperscale AI clusters.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

Design and architect hardware systems, perform trade-off analysis, develop and verify RTL, integrate and verify memory controllers and PHYs, and support customer deliveries. The role requires ASIC or FPGA design expertise, scripting and simulation experience, and collaboration with engineering and customer teams. Preferred experience includes synthesis, timing constraints, CDC/RDC, memory technologies, and AMBA protocols.

Develops platform hardware from system requirements through schematic capture, PCB layout, board bring-up, debugging, validation, and customer delivery. The role defines components and routing rules, evaluates BOM costs and design tradeoffs, ensures hardware-software compatibility, performs electrical and mixed-signal design activities, and leads power-on and system debug efforts. It requires cross-functional collaboration with architects, verification, manufacturing, project management, and technical teams.

Owns the hardware lifecycle for GPU and infrastructure assets, including fleet health monitoring, vendor RMA workflows, firmware and BIOS upgrades, burn-in testing, failure investigation, inventory accuracy, capacity planning, spare-parts strategy, runbook creation, and new platform qualification. The role serves as the technical owner of physical compute platforms and supports high-density GPU infrastructure across sites.

Develop and own compute and GPU server platforms from architecture through global deployment. Responsibilities include schematic and layout reviews, design for manufacturability, new product introduction, board and system bring-up, validation, debugging, firmware and BIOS feature management, technology qualification, and vendor coordination. The role requires hands-on server architecture, board-level design, Linux and scripting expertise, platform validation, and five-day-per-week presence in the Cambridge office.

Drive architecture and development of datacenter systems from chip-level components through full-scale deployments. Collaborate across silicon, software, networking, operations, suppliers, procurement, and customers to evaluate performance, power, cost, hardware, thermal, and mechanical tradeoffs. Lead multidisciplinary teams, guide product strategy, monitor competitive solutions, and execute systems from concept through production. The role requires deep hardware and server architecture expertise, plus experience spanning software and hardware.

Validate server hardware components and new platform designs through power, thermal, performance, firmware, and automation testing. Maintain hardware test infrastructure, document technical findings, coordinate with ODM/OEM partners, and collaborate with software teams on BIOS, kernel, and firmware optimization. The role requires expertise in server architectures, validation methodologies, Linux, Python, Bash, Redfish, IPMI, and industry standards including PCIe, NVMe, and DDR.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Develop and maintain full-chip physical implementation flows for SoC designs, including floorplanning, partitioning, hierarchical block integration, placement and routing coordination, power grid planning and IR analysis, CTS strategy integration, and scalable multi-block/multi-power-domain assembly methodologies using Innovus.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

Provides technical leadership and customer support for Marvell switching, PHY, and processor SoC products. Architects hardware solutions, investigates and reproduces hardware and software issues, performs schematic reviews, debugs boot sequencing and customer-reported problems, and supports Linux BSPs, U-Boot, device drivers, and board designs. Serves as a liaison among customers, Avnet field applications engineers, and Marvell engineering teams, while delivering training and occasional customer-site support.

Design and optimize high-speed, high-density ASIC package layouts and substrate breakouts. Perform pinout optimization, routing, placement, stack-up, power distribution, CAD library development, feasibility studies, and productivity methodology improvements while collaborating with package leads and cross-functional teams.

Design and perform physical layout for silicon interposers using Cadence Virtuoso; run DRC/LVS and verification (Calibre, ICV, Thunder); perform feasibility studies, floorplanning, custom layout, and collaborate with package, SI, and technology teams to meet schedule, cost, manufacturability, and electrical goals.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.