Top Senior Hardware Engineer Jobs in Portland, OR

Develop and maintain full-chip physical implementation flows for SoC designs, including floorplanning, partitioning, hierarchical block integration, placement and routing coordination, power grid planning and IR analysis, CTS strategy integration, and scalable multi-block/multi-power-domain assembly methodologies using Innovus.

Pipeline hiring for hardware engineers at all experience levels. Work includes circuit board design, schematic capture, component selection and prototype bring-up, hardware debug/testing and failure analysis, integration with firmware/software teams, and design for manufacturability with production handoff.

Provide customer-facing technical enablement for Intel IPU and Ethernet products, including board/platform bring-up, validation, hardware/firmware/software debug, tool development, documentation, and cross-functional feedback to accelerate customer designs and product ramps.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

Design, document, and implement PCBA and end-of-line tests and fixtures. Develop and debug flying-probe and automated Windows-based test software, support manufacturing, mentor junior engineers, and improve test coverage and efficiency.

Design, document, and implement PCBA and end-of-line production tests; develop/debug tests on flying-probe platforms; build test automation software and fixtures; configure Windows test platforms; mentor junior engineers; train factory staff; analyze and resolve hardware test issues and improve test coverage and efficiency.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.

Design, test, and validate next-generation server hardware and components for performance, power, and reliability. Diagnose and resolve hardware issues across engineering and manufacturing, document results, and develop/maintain test scripts. Collaborate with internal teams and OEM/ODM partners to scale platforms for global deployment.

The Senior Package Layout Engineer will collaborate with teams to design IC substrates, optimize layouts, and improve productivity using Cadence tools.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.