Top Senior Hardware Engineer Jobs in Portland, OR

Develop and maintain transistor-level timing characterization flows, CAD infrastructure, and automation for custom IPs and memory. Collaborate with circuit, memory, STA, and methodology teams; validate Liberty models and SPICE-based characterizations; support platforms, scripts, and EDA vendor tool evaluations.

Develop and maintain full-chip physical implementation flows for SoC designs, including floorplanning, partitioning, hierarchical block integration, placement and routing coordination, power grid planning and IR analysis, CTS strategy integration, and scalable multi-block/multi-power-domain assembly methodologies using Innovus.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

Provide customer-facing technical enablement for Intel IPU and Ethernet products, including board/platform bring-up, validation, hardware/firmware/software debug, tool development, documentation, and cross-functional feedback to accelerate customer designs and product ramps.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.

As a Senior Hardware Engineer, you'll drive DPU integration into server platforms, execute validation testing, and develop automation for data analysis while collaborating with cross-functional teams and vendors.

Lead on-site technical authority for datacenter hardware reliability and fleet health. Troubleshoot complex hardware failures, drive root cause analysis and corrective actions, coordinate with vendors and cloud providers, establish maintenance standards and runbooks, support new hardware introductions and spare parts strategy, mentor technicians, and analyze failure trends to improve reliability across large-scale GPU and server deployments.

The Senior Package Layout Engineer will collaborate with teams to design IC substrates, optimize layouts, and improve productivity using Cadence tools.