Top Design Engineer Jobs

22 Days AgoSaved
In-Office
Kapolei, HI, USA
60K-70K Annually
Mid level
60K-70K Annually
Mid level
Logistics • Retail • Design • Manufacturing
Develops locally manufactured products from sketches and CAD designs through prototyping and production. Experiments with wood, laser, UV printing, dye-sublimation, materials, machinery, automation, and AI tools. Tests prototypes for durability, safety, and finish; improves factory quality, efficiency, and cost; writes specifications and engineering changes; and collaborates with production on products for CocoNene and Pictures Plus.
Top Skills: Adobe Creative SuiteAi ToolsAutomationCadDye-SublimationFusion 360Laser PrintingRhinoSolidworksUv Printing
One Month AgoSaved
Hybrid
Cedar Rapids, IA, USA
88K-150K Annually
Senior level
88K-150K Annually
Senior level
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Develop and execute project quality plans, verify software and process conformance, support testing and validation, review engineering artifacts, analyze performance metrics, participate in code reviews, drive root cause and corrective actions, and mentor junior engineers. The role supports quality management system and contractual requirements for navigation and sensor systems in a flexible hybrid environment.
Top Skills: AgileAs9100CC++GitIso 9000JavaScriptJIRAOraclePerlPythonRubyScaled Agile Framework (Safe)Scrum
One Month AgoSaved
Hybrid
Manchester, NH, USA
97K-165K Annually
Senior level
97K-165K Annually
Senior level
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Designs and supports FPGA systems throughout development, including requirements, RTL coding, synthesis, place and route, timing closure, testbench development, lab testing, debugging, and product support. The role requires expertise in VHDL or Verilog, FPGA development tools, simulation, timing analysis, clock-domain crossing, and high-speed interfaces. Additional responsibilities include modifying legacy designs, implementing micro-architectures, collaborating with verification teams, and performing hands-on hardware debug.
Top Skills: AdcAsicClearcaseClock Domain CrossingCvsDacDdr2Ddr3Ddr4FpgaGitIntel QuartusLvdsModelsimPciePerlPythonQuestaSerdesShell ScriptingStatic Timing AnalysisSubversionTclVerilog HdlVhdlXilinx Vivado
One Month AgoSaved
Hybrid
Nashua, NH, USA
97K-165K Annually
Senior level
97K-165K Annually
Senior level
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Designs and supports FPGA systems throughout development, including requirements, RTL coding, synthesis, place and route, timing closure, testbench development, lab testing, debugging, and product support. The role also involves high-speed interfaces, design verification collaboration, legacy design enhancement, hardware debugging, and micro-architecture implementation. This is a fully onsite position requiring U.S. citizenship and Secret clearance eligibility.
Top Skills: AdcAsicClearcaseClock Domain CrossingCvsDacDdr2Ddr3Ddr4FpgaGitIntel QuartusLvdsModelsimPciePerlPythonQuestaSerdesShell ScriptingStatic Timing AnalysisSubversionTclVerilog HdlVhdlXilinx Vivado
One Month AgoSaved
Hybrid
Manchester, NH, USA
133K-226K Annually
Senior level
133K-226K Annually
Senior level
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Designs and supports FPGA hardware through requirements, architecture, RTL coding, synthesis, place-and-route, timing closure, simulation, lab testing, debugging, and product support. The role requires VHDL or Verilog, FPGA tool expertise, high-speed interface experience, static timing analysis, revision control, scripting, and security-clearance eligibility. Preferred experience includes micro-architecture, legacy design enhancement, design leadership, hardware debug, verification collaboration, and ADC/DAC techniques. This is a full-time onsite position supporting defense electronics.
Top Skills: AdcAsicClearcaseClock Domain CrossingCvsDacDdr2/3/4FpgaGitIntel QuartusLvdsModelsimPciePerlPythonQuestaSerdesShell ScriptingStatic Timing AnalysisSubversionTclVerilog HdlVhdlXilinx Vivado
22 Days AgoSaved
In-Office
Santa Clara, CA, USA
Mid level
Mid level
Robotics • Defense
Designs, simulates, verifies, debugs, and validates FPGA-based hardware and embedded systems from concept through production. Responsibilities include RTL development, digital architecture, IP integration, timing closure, hardware bring-up, system integration, automated testing, documentation, and cross-functional collaboration with firmware, software, electrical, manufacturing, and test teams.
Top Skills: Amd/XilinxCanDdrDspEthernetFpgaI2CIntel/AlteraLatticeMicrochipPcieSoc FpgaSpiSystemverilogUartUsbVerilogVhdl
Reposted 22 Days AgoSaved
In-Office
Milpitas, CA, USA
141K-207K Annually
Senior level
141K-207K Annually
Senior level
Hardware
The Sr. FPGA Engineer designs and implements FPGA and firmware for E-beam inspection systems, collaborates with teams on performance specifications, and maintains technical documentation.
Top Skills: 10GAuroraDdr4Embedded LinuxFpgaI2CIntel/AlteraModelsimPcieSpiSystem VerilogVcsVerilogVivadoXilinx
Reposted 22 Days AgoSaved
In-Office
San Diego, CA, USA
140K-190K Annually
Expert/Leader
140K-190K Annually
Expert/Leader
Software
Lead end-to-end PCB architecture, schematic capture, and layout for high-performance cellular base stations. Design RF, analog, digital, high-speed SerDes, and power circuits; optimize stack-up, signal/power/thermal integrity, drive DFM/vendor reviews, support board bring-up, and mentor other designers while collaborating cross-functionally.
Top Skills: Ai-Assisted Eda ToolsCadence AllegroHermes64 Rf SocHigh-Speed SerdesLlm/Ai Copilots
23 Days AgoSaved
In-Office
Arvada, CO, USA
84K-106K Annually
Junior
84K-106K Annually
Junior
Aerospace • Security • Energy • Industrial
Designs, tests, and improves mechanical pump and compressor equipment. Responsibilities include pump calculations, CAD modeling, manufacturing drawings, bills of material, nonconformance resolution, quality documentation, testing, troubleshooting, design-for-manufacturing improvements, new product development, cost reduction, and project leadership. The engineer also supports equipment maintenance, trains technicians, and occasionally travels to customer or supplier sites.
Top Skills: 3D Modeling SoftwareAutocadSiemens Nx
23 Days AgoSaved
In-Office
Arvada, CO, USA
84K-106K Annually
Junior
84K-106K Annually
Junior
Aerospace
Designs, tests, and improves mechanical pump and compressor equipment. Responsibilities include pump calculations, CAD modeling, assembly and manufacturing drawings, bills of material, testing, troubleshooting, nonconformance resolution, quality documentation, manufacturing process development, continuous improvement, cost reduction, and new product development. Leads projects involving budgets and schedules, supports technicians, and occasionally travels to customer or supplier sites.
Top Skills: 3D Modeling SoftwareAutocadSiemens Nx
23 Days AgoSaved
In-Office
Tucson, AZ, USA
130K-170K Annually
Senior level
130K-170K Annually
Senior level
Other • Professional Services
Lead roadway and highway design for Arizona transportation projects, including highways, arterials, interchanges, corridors, and multimodal facilities. Prepare plans, specifications, quantities, and cost estimates; coordinate multidisciplinary teams; mentor engineers and designers; and support project planning, budgeting, scheduling, client communications, proposals, and business development. The role requires extensive transportation engineering experience, ADOT project knowledge, proficiency with roadway design software, a civil engineering degree, and a Professional Engineer license.
Top Skills: Aashto Design StandardsCivil 3DMicrostationOpenroads Designer
23 Days AgoSaved
In-Office
Phoenix, AZ, USA
130K-170K Annually
Senior level
130K-170K Annually
Senior level
Other • Professional Services
Leads roadway and highway design projects across Arizona, including plans, specifications, quantities, and cost estimates. Coordinates multidisciplinary teams, mentors engineers and designers, supports project budgeting, scheduling, client communications, proposals, and business development. The role requires extensive transportation engineering experience, ADOT project knowledge, proficiency with roadway design software, a Civil Engineering degree, and a Professional Engineer license. Work is hybrid between office and field environments.
Top Skills: Aashto Design StandardsCivil 3DMicrostationOpenroads Designer
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23 Days AgoSaved
In-Office
Phoenix, AZ, USA
105K-140K Annually
Senior level
105K-140K Annually
Senior level
Other • Professional Services
Design roadway, highway, and multimodal transportation projects for Arizona agencies. Develop alignments, profiles, sections, plans, specifications, estimates, calculations, and technical reports. Coordinate with multidisciplinary teams, support projects from planning through construction, and perform quality reviews for ADOT and local standards. The role offers opportunities to expand technical expertise and develop project leadership responsibilities.
Top Skills: AashtoAutocadCivil 3DMicrostationOpenroads Designer
One Month AgoSaved
In-Office
Berthoud, CO, USA
143K-179K Annually
Senior level
143K-179K Annually
Senior level
Aerospace • Defense
Leads mechanical design, kinematic and structural analysis, integration, material selection, testing, and verification of movable thrust-vectoring nozzles for solid rocket motors. Coordinates EMA and sensor suppliers, presents technical maturity and risk data at program milestones, and supports static and flight-test qualification. Requires extensive rocket propulsion and movable nozzle/TVC experience, advanced CAD and FEA familiarity, and eligibility for a DoD Secret clearance.
Top Skills: AnsysCarbon-Phenolic CompositesCreoElectromechanical Actuators (Emas)Finite Element Analysis (Fea)Linear Variable Differential Transformers (Lvdts)NxRefractory MetalsSolid Rocket MotorsString PotentiometersStructural CompositesThrust Vector Control (Tvc)
23 Days AgoSaved
In-Office
Denver, CO, USA
91K-139K Annually
Junior
91K-139K Annually
Junior
Aerospace
Designs and develops fluid-handling, thermal, mechanical, and structural components for lunar fuel-cell power systems. Responsibilities span concept development, CAD modeling, analysis, supplier coordination, procurement, fabrication, testing, qualification, documentation, and operational support. The engineer collaborates across vehicle subsystems, manages risks and development status, creates technical documentation, and supports flight hardware throughout its lifecycle.
Top Skills: 3D CadAgile Project ManagementAnsysAsme Y14.5Cfd AnalysisCreoGd&TPiping And Instrumentation Diagrams (P&Ids)Product Lifecycle Management (Plm)Sinda/FluintThermal DesktopWindchill Plm
23 Days AgoSaved
In-Office
Hayward, CA, USA
145K-219K Annually
Senior level
145K-219K Annually
Senior level
Artificial Intelligence • Hardware • Robotics • Software
Leads manufacturing process development, validation, new product introduction, production scaling, and continuous improvement for advanced unmanned aircraft systems. Develops tooling, work instructions, control plans, capacity models, and production-readiness criteria. Partners with design, quality, supply chain, test, suppliers, and production teams to transition electromechanical products into high-volume manufacturing. Investigates defects, improves yield and throughput, supports automation, and provides hands-on assistance during pilot builds and production ramps.
Top Skills: 5 Whys8DAs9100CadDesign For Six SigmaEnterprise Resource Planning (Erp)Faa Part 107Fault Tree AnalysisFishbone AnalysisFmeaGeometric Dimensioning And Tolerancing (Gd&T)Lean ManufacturingManufacturing Execution Systems (Mes)Product Lifecycle Management (Plm)Six SigmaStatistical Process Control (Spc)
23 Days AgoSaved
In-Office
2 Locations
164K-312K Annually
Expert/Leader
164K-312K Annually
Expert/Leader
Artificial Intelligence • Cloud • Information Technology • Software
Design and develop AI SoC hardware through microarchitecture definition, RTL coding, simulation, and logic optimization. Perform timing, power, area, and design-integrity quality checks; integrate and validate IPs; support verification and resolve test failures. Apply secure development practices and drive quality assurance for IP and SoC handoff. Collaborate across multidisciplinary teams to deliver high-quality designs under demanding schedules.
Top Skills: Clock Domain Crossing AnalysisLogic DesignMicroarchitecturePower AnalysisRtlSimulationSocSystemverilogTiming Analysis
23 Days AgoSaved
In-Office
Santa Clara, CA, USA
164K-232K Annually
Senior level
164K-232K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Design, simulate, optimize, and validate silicon photonic components including modulators, detectors, lasers, and passive devices. Lead test-chip development from layout and tapeout through testing, analyze characterization data, develop component models and test methodologies, and research emerging photonics technologies. Collaborate with multidisciplinary engineering teams to meet system, reliability, manufacturability, and performance requirements for optical communication, data center, and AI applications.
Top Skills: CadenceCircuit-Level SimulationDriversDspsInverse DesignJmpKlayoutLumerical DeviceLumerical FdtdLumerical InterconnectLumerical ModeMatlabMonte Carlo AnalysisOptical Spectrum AnalyzersOptical Vector AnalyzersPhotonic Integrated CircuitsPythonRsoftSilicon PhotonicsTiasTidy3DTunable Lasers
23 Days AgoSaved
In-Office
Santa Clara, CA, USA
150K-270K Annually
Senior level
150K-270K Annually
Senior level
Software
Designs, validates, debugs, and sustains SSD hardware from concept through production. Leads architecture, schematic and layout development, component selection, interoperability testing, system-level tradeoff analysis, failure investigations, and customer issue resolution. Collaborates with test engineers, partners, and JDMs, applies automation and AI to validation, and mentors junior engineers. The role is primarily in-office in Santa Clara, California.
Top Skills: BashDdrDifferential ProbesHigh-Speed OscilloscopesI2CNandPciePythonSpiSsd
23 Days AgoSaved
In-Office
Tucson, AZ, USA
105K-140K Annually
Senior level
105K-140K Annually
Senior level
Other • Professional Services
Design roadway, highway, and multimodal transportation projects for Arizona agencies. Develop alignments, profiles, cross-sections, plans, specifications, estimates, reports, and engineering calculations. Coordinate with multidisciplinary teams, support projects from planning through construction, perform quality reviews, and ensure compliance with ADOT and local standards. The role requires a Professional Engineer license, roadway engineering experience, and proficiency with transportation design software.
Top Skills: AutocadCivil 3DMicrostationOpenroads Designer
Reposted 23 Days AgoSaved
In-Office
2 Locations
151K-282K Annually
Senior level
151K-282K Annually
Senior level
Cloud • Information Technology • Internet of Things • Professional Services • Software
Lead system- and board-level design for hyperscaler switches: define specs, create schematics/PCB, FPGA/ASIC design and bring-up, debug high-speed interfaces, coordinate across ASIC, SI, software, diagnostics, manufacturing, and supplier teams to resolve design issues.
Top Skills: 100G400G800G)AsicCpuDramEthernet (25GFpgaI2CMdc/MdioOscilloscopePcbPcieProtocol AnalyzersPythonSchematic CaptureSignal IntegritySilicon OneSpiTclVerilogVhdl
23 Days AgoSaved
In-Office
Milpitas, CA, USA
137K-259K Annually
Senior level
137K-259K Annually
Senior level
Cloud • Information Technology • Internet of Things • Professional Services • Software
Own complex board-level subsystems and products from hardware definition through qualification and manufacturing release. Design digital, analog, and mixed-signal circuits, high-speed routing, power-delivery solutions, and verification plans. Lead board bring-up, validation, signal and power integrity analysis, EMI/EMC and thermal risk resolution, design reviews, documentation, and product release. Collaborate with ASIC, software, mechanical, manufacturing, supplier, and other engineering teams while mentoring junior engineers.
Top Skills: AnsysAsicCadence AllegroCadence Concept/Design EntryDdr4Ddr5EthernetFpgaHyperlynxI2CKeysight AdsMdioOscilloscopesPciePol ConvertersProtocol AnalyzersSerdesSpiTdrsVnasVrm
23 Days AgoSaved
In-Office
Austin, TX, USA
Senior level
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Leads semiconductor design verification strategy and execution using UVM/SystemVerilog, constrained-random testing, formal verification, and gate-level simulation. Designs reusable testbenches, develops complex sequences, analyzes coverage, debugs design issues, and oversees verification sign-off. Mentors junior engineers, coordinates with design, architecture, and emulation teams, and manages verification schedules, risks, and priorities.
Top Skills: AsicBus Functional Models (Bfms)Code CoverageConstrained-Random TestingFormal VerificationFunctional CoverageGate-Level Simulation (Gls)Semiconductor VerificationSocSystemverilogUvm
23 Days AgoSaved
In-Office
Austin, TX, USA
Expert/Leader
Expert/Leader
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Lead design verification strategy and execution for customer ASIC projects. Architect reusable UVM/SystemVerilog testbenches, develop constrained-random tests, analyze coverage, perform formal verification and gate-level simulation, debug complex design issues, and provide verification sign-off. Mentor junior engineers, manage verification schedules and risks, and collaborate with design, architecture, emulation, and customers.
Top Skills: AhbApbAxiCpfDdrFormal VerificationGate-Level SimulationPcieQuestaRtlSimvisionSystemverilogUpfUvmVcsVerisiumXcelium
23 Days AgoSaved
In-Office
Austin, TX, USA
Senior level
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Lead verification strategy and architecture for semiconductor ASIC and SoC designs. Build reusable UVM/SystemVerilog testbenches, develop constrained-random tests, perform formal verification and gate-level simulation, analyze coverage, debug complex design issues, and approve verification sign-off. Mentor junior engineers, coordinate with design, architecture, and emulation teams, and manage verification schedules, risks, and priorities.
Top Skills: AsicBus Functional ModelsConstrained-Random VerificationFormal VerificationGate-Level SimulationSocSystemverilogUvmVlsi
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