Top Design Engineer Jobs

Reposted 6 Days AgoSaved
In-Office
Boise, ID, USA
Entry level
Entry level
Artificial Intelligence • Hardware • Information Technology • Machine Learning
Design and analyze digital and analog memory circuits (arrays, control logic, datapaths, decoders) using simulation and layout tools. Optimize power, speed, die size, manufacturability, and apply AI-enabled tools to improve design flow while collaborating with cross-functional teams for validation and product readiness.
Top Skills: Ai-Enabled Design ToolsDesign-For-Manufacturing (Dfm)Parasitics ExtractionSemiconductor Process TechnologiesSpiceVerilog
6 Days AgoSaved
Hybrid
Palo Alto, CA, USA
133K-235K Annually
Mid level
133K-235K Annually
Mid level
Artificial Intelligence • Cloud • Machine Learning • Mobile • Software • Virtual Reality • App development
Design, prototype, analyze, and document consumer electronics products from concept through mass production. Collaborate with industrial design, operations, suppliers, contract manufacturers, and engineering teams. Conduct failure analysis, corrective actions, technical experiments, design reviews, and development builds. The role requires strong mechanical engineering fundamentals, CAD proficiency, materials and manufacturing knowledge, and international travel up to 20%.
Top Skills: 2D Cad Documentation3D CadDesign For ManufacturingFpcNx CadPcbStructural AnalysisTolerance Analysis
6 Days AgoSaved
In-Office
Berkeley, MO, USA
92K-124K Annually
Junior
92K-124K Annually
Junior
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
Designs and documents electrical systems, interfaces, wiring, connections, and test hardware for aerospace environmental testing. Responsibilities include selecting electrical components, supporting instrumentation and data acquisition, directing installation, and assisting with inspection, checkout, troubleshooting, and test execution. The role collaborates with mechanical, systems, and test teams and supports Boeing defense and space programs.
Top Skills: AutocadMicrosoft VisioNi LabviewSiemens Capital
Reposted 6 Days AgoSaved
In-Office
Huntsville, AL, USA
92K-185K Annually
Senior level
92K-185K Annually
Senior level
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
Designs, develops, debugs, verifies, and integrates FPGA logic, processor subsystem features, high-speed SERDES interfaces, and built-in test capabilities. Responsibilities include requirements development, HDL coding, testbench creation, simulation, synthesis, timing analysis, board-level troubleshooting, validation, and system integration. Collaborates with multidisciplinary engineering teams supporting aerospace, flight control, air traffic control, and homeland defense applications.
Top Skills: Altera QuartusBuilt-In-Test (Bit)CC++ChipscopeFpgaGitlabHdlMatlabMicrochipMicrosemiModelsimNcsimSerdesSimulinkSynplifyUvmVcsVerilogVersal FpgasVitisXilinx IseXilinx Vivado
Reposted 6 Days AgoSaved
In-Office
Huntsville, AL, USA
112K-185K Annually
Mid level
112K-185K Annually
Mid level
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
The Analog Design Engineer at Boeing will design and support electronics systems, create designs and documentation, conduct simulations, and collaborate to ensure producibility and reliability of designs.
Top Skills: AltiumDmmFpgaLtspiceMatlabMentor Graphics SiemensMicrocontrollersOscilloscopePcbPspiceSimplisSpectrum Analyzer
Reposted 6 Days AgoSaved
In-Office
El Segundo, CA, USA
166K-274K Annually
Senior level
166K-274K Annually
Senior level
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
Leads multidisciplinary spacecraft structural and mechanical design integration from requirements through production support. Oversees design teams, system trades, payload accommodation, interface control, clearance verification, manufacturing integration, qualification testing, milestone reviews, nonconformance resolution, and emerging technology investigations. The role is fully onsite in El Segundo, California, and requires U.S. person status, eligibility for a U.S. security clearance, and a Secret clearance post-start.
Top Skills: DfmatDigital Mock-Up (Dmu)Satellite SystemsSpacecraft SystemsVirtual Manufacturing (Vm)
Reposted 6 Days AgoSaved
In-Office
El Segundo, CA, USA
98K-177K Annually
Junior
98K-177K Annually
Junior
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
Lead hardware product development from concept through design, build, integration, and test. Own CAM responsibilities, manage schedule/cost/risk, perform derating and root-cause analysis, drive corrective actions and configuration changes, mentor junior engineers, and ensure technical decisions meet mission requirements.
Top Skills: AtloCamDeratingElectrical FundamentalsHardware DesignRccaReaSmc-S-016/Mas
Reposted 6 Days AgoSaved
In-Office
St. Charles, MO, USA
127K-171K Annually
Senior level
127K-171K Annually
Senior level
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
Designs, develops, integrates, verifies, and supports structural and payload systems for military aircraft and weapons platforms. Uses 3-D CAD and GD&T to create engineering definitions, manage supplier activities, support fabrication and testing, develop tooling and equipment concepts, and ensure compliance with safety, producibility, maintainability, reliability, ergonomic, and regulatory requirements. The role also contributes to requirements definition, systems integration, vehicle tooling workflows, and future product concepts.
Top Skills: 3-D CadAsme Y14.5MGeometric Dimensioning And Tolerancing (Gd&T)Model-Based Engineering (Mbe)Nx
6 Days AgoSaved
Hybrid
2 Locations
Expert/Leader
Expert/Leader
Automotive • Big Data • Information Technology • Robotics • Software • Transportation • Manufacturing
Leads suspension system development for defense vehicles across concept, design, validation, production readiness, and launch. Designs robust chassis components, manages specifications, validation plans, engineering changes, supplier delivery, and compliance requirements. Applies DFMEA, DRBFM, DFSS, GD&T, tolerance analysis, CAE, and TcVis. Analyzes field data and KPIs, resolves complex engineering issues, supports vehicle build processes, and mentors junior engineers.
Top Skills: CaeGd&TTcvis
6 Days AgoSaved
Hybrid
Warren, MI, USA
Mid level
Mid level
Automotive • Big Data • Information Technology • Robotics • Software • Transportation • Manufacturing
Integrates vehicle compartment engineering requirements across architecture, design, human factors, performance, and manufacturing. Develops packaging solutions, space claims, engineering criteria, and NX models while balancing customer needs, design intent, cost, mass, timing, assembly, and dimensional variation. Leads cross-functional integration meetings, resolves packaging issues, benchmarks competitive vehicles, supports virtual and physical assessments, and incorporates customer insights into vehicle package design.
Top Skills: CadDesign For Six Sigma (Dfss)Digital ModelingMathematical ModelingPhysical ModelingUnigraphics/NxVr/Mr Mockups
Reposted 7 Days AgoSaved
Hybrid
Austin, TX, USA
Senior level
Senior level
Cloud • Information Technology • Security • Software • Cybersecurity
Design and build frontend experiences and components for the Cloudflare dashboard. Collaborate with design and systems engineers, own code from inception to release, and improve developer experience. Debug, optimize, and identify failure modes in large-scale frontend and distributed systems.
Top Skills: Cloud PrimitivesDistributed SystemsFigmaReactTypescript
7 Days AgoSaved
Hybrid
Cedar Rapids, IA, USA
127K-215K Annually
Senior level
127K-215K Annually
Senior level
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Designs and supports FPGA systems across the full development lifecycle, including requirements, architecture, RTL coding, synthesis, place-and-route, timing closure, simulation, lab testing, debugging, and product support. The role requires VHDL or Verilog, FPGA tools, high-speed interfaces, static timing analysis, clock-domain crossing expertise, revision control, scripting, and hardware debug. The engineer will work onsite, collaborate with verification teams, mentor others, and may lead design activities.
Top Skills: AdcAsicClearcaseCvsDacDdr2Ddr3Ddr4FpgaGitIntel QuartusLvdsModelsimPciePerlPythonQuestaSerdesShell ScriptingSubversionTclVerilog HdlVhdlXilinx Vivado
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7 Days AgoSaved
Hybrid
Cedar Rapids, IA, USA
97K-165K Annually
Senior level
97K-165K Annually
Senior level
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Designs and supports FPGA hardware through requirements, RTL coding, synthesis, place and route, timing closure, simulation, lab testing, debugging, and product support. The role requires experience with FPGA or ASIC development, HDL coding, high-speed interfaces, revision control, scripting, and hardware verification. It is fully onsite, requires U.S. citizenship, and requires a current Secret clearance or eligibility to obtain one.
Top Skills: AdcAsicClearcaseClock Domain CrossingCvsDacDdr2Ddr3Ddr4FpgaGitIntel QuartusLvdsModelsimPciePerlPythonQuestaRtlSerdesShell ScriptingStatic Timing AnalysisSubversionTclVerilog HdlVhdlXilinx Vivado
7 Days AgoSaved
Hybrid
Cedar Rapids, IA, USA
145K-247K Annually
Senior level
145K-247K Annually
Senior level
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Designs and supports FPGA systems through requirements, architecture, RTL coding, synthesis, place-and-route, timing closure, simulation, laboratory testing, debugging, and product support. The role requires expertise in FPGA or ASIC development, HDL coding, high-speed interfaces, timing analysis, revision control, scripting, and hands-on hardware debug. Responsibilities may include mentoring engineers, modifying legacy designs, supporting verification teams, and leading design activities. This is a full-time onsite defense role requiring Secret clearance or eligibility.
Top Skills: AdcAsicClearcaseClock Domain CrossingCvsDacDdr2Ddr3Ddr4FpgaGitIntel QuartusLvdsModelsimPciePerlPythonQuestaSerdesShell ScriptingStatic Timing AnalysisSubversionTclVerilog HdlVhdlXilinx Vivado
7 Days AgoSaved
Hybrid
Cedar Rapids, IA, USA
133K-226K Annually
Senior level
133K-226K Annually
Senior level
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Leads advanced FPGA and digital design from concept through delivery for mission-critical defense systems. Architects and implements FPGA solutions using VHDL and SystemVerilog, performs synthesis, timing analysis, verification, and optimization, and integrates hardware, software, and systems. Conducts lab and flight-test validation, supports proposals and design reviews, manages configuration and documentation, mentors engineers, and monitors program schedules and budgets.
Top Skills: AutocheckCC++Ci/CdClock Domain CrossingDigital-Twin Co-SimulationFpgaGigabit-Rate Serial LinksGitGitlabIntelLatticeLintLinuxMatlabMicrochipModelsimPciePerlPythonQuestasimReset Domain CrossingRf DspRfsocSimulinkStatic Timing AnalysisSystemverilogTclUvmVerilogVhdlVivadoXilinxXilinx Zynq Soc
7 Days AgoSaved
Hybrid
Cedar Rapids, IA, USA
133K-226K Annually
Senior level
133K-226K Annually
Senior level
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Designs and supports FPGA solutions across requirements, architecture, RTL coding, synthesis, place and route, timing closure, simulation, lab testing, debugging, and product support. The role requires VHDL or Verilog, FPGA tools, timing analysis, clock-domain crossing, high-speed interfaces, revision control, and scripting. It involves onsite collaboration, hardware debug, design verification, mentoring, and potentially leading design teams. A Secret clearance is required or must be obtainable.
Top Skills: AdcAsicClearcaseClock Domain CrossingCvsDacDdr2Ddr3Ddr4FpgaGitIntel QuartusLvdsModelsimPciePerlPythonQuestaSerdesShell ScriptingStatic Timing AnalysisSubversionTclVerilog HdlVhdlXilinx Vivado
7 Days AgoSaved
In-Office
2 Locations
139K-295K Annually
Senior level
139K-295K Annually
Senior level
Artificial Intelligence • Hardware • Information Technology • Machine Learning
Designs, implements, validates, and optimizes next-generation DRAM memory products, including LPDDR and DDR. Responsibilities include circuit architecture, layout oversight, parasitic modeling, simulation, verification, tape-out revisions, silicon debugging, root-cause analysis, and product qualification. The role collaborates across architecture, process, product, packaging, and test teams; leads technical investigations and design reviews; mentors engineers; and advances design methodologies and future memory technologies.
Top Skills: Ai-Enabled ToolsAnalog CircuitsCircuit LayoutCircuit SimulationDdrDesign VerificationDramFloor-PlanningLogic CircuitsLpddrMemory CircuitsParasitic ModelingPlacement And RoutingSilicon Debugging
7 Days AgoSaved
In-Office
Orlando, FL, USA
Mid level
Mid level
Hardware • Robotics
Designs and optimizes BLDC and PMSM propulsion motors for UAVs using electromagnetic, thermal, and multiphysics simulation. Develops motor geometries, windings, magnet layouts, performance parameters, and operating models; supports prototype builds and validates simulations against laboratory and flight-test data. Collaborates with mechanical design, manufacturing, testing, and production teams to deliver efficient, reliable, scalable, and cost-effective motors.
Top Skills: Ansys MaxwellBldc MotorsElectromagnetic SimulationFluxJmagMotor-CadMultiphysics SimulationPmsm MotorsUav Propulsion Systems
Reposted 7 Days AgoSaved
Hybrid
Austin, TX, USA
Senior level
Senior level
Cloud • Information Technology • Internet of Things • Machine Learning • Software • Cybersecurity • Infrastructure as a Service (IaaS)
As a Senior AI Compiler Engineer, you will design and build a custom MLIR-based compiler stack for next-gen silicon, optimizing AI models without an OS. Responsibilities include creating MLIR dialects, ensuring accuracy in lowering computational graphs, and maintaining a high-performance compiler codebase.
Top Skills: C++LlvmMlir
Reposted 7 Days AgoSaved
In-Office
El Segundo, CA, USA
99K-162K Annually
Junior
99K-162K Annually
Junior
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
Design and implement ASICs for mission-critical aerospace and space applications. Responsibilities include synthesis, static timing analysis, timing constraint management, floorplanning, power and timing convergence, equivalence checking, ECOs, chip integration, signoff, tapeout, and automation. The role collaborates with RTL, verification, DFT, architecture, and external backend teams while troubleshooting cross-domain timing issues and improving physical design methodologies.
Top Skills: AsicClock Tree SynthesisCpfDftEcoEda ToolsFloorplanningLogic SynthesisPerlPhysical DesignPhysical VerificationPlace And RoutePythonSocStatic Timing AnalysisTclUpf
Reposted 7 Days AgoSaved
In-Office
2 Locations
160K-240K Annually
Senior level
160K-240K Annually
Senior level
Aerospace • Artificial Intelligence • Machine Learning • Robotics • Software • Defense Technology
Design and develop primary and secondary structural components for a next-generation UAV. Execute full design lifecycle, perform hand calculations and limited FEA, collaborate across disciplines, support validation/testing, and produce design documentation and drawings to aerospace standards.
Top Skills: AbaqusAnsysAsme Y14.5CadCatiaDfmaFaaFeaGd&TMil-StdNastranNxSolidworks
8 Days AgoSaved
Hybrid
Richardson, TX, USA
150K-226K Annually
Expert/Leader
150K-226K Annually
Expert/Leader
Aerospace • Artificial Intelligence • Cloud • Machine Learning • Software • Cybersecurity • Defense
Leads GaN and GaAs MMIC design for radar, electronic warfare, and space applications. Responsibilities include circuit architecture, FET selection, simulation, layout, electromagnetic and packaging analysis, RF/microwave laboratory measurements, design reviews, manufacturing readiness, foundry and supplier collaboration, technical reporting, customer support, IR&D leadership, continuous improvement, and mentoring engineers.
Top Skills: AdsAnalyst 3D FemAnsys SolidworksAutocadAwrAxiemCadenceDiodesElectromagnetic SimulationFetsFoundry Pdk ModelsGaasGanMmicPna-XRf/Microwave
8 Days AgoSaved
In-Office
Richardson, TX, USA
Internship
Internship
Artificial Intelligence • Hardware • Information Technology • Machine Learning
Supports HBM memory and logic design through RTL development, circuit implementation, simulation, verification, timing and power analysis, debugging, and functional validation. Develops scripting, automation, and AI-assisted workflows to improve engineering productivity. Collaborates with design verification, physical design, CAD, and product engineering teams while documenting technical findings and methodologies.
Top Skills: AsicCC++CmosDdrDramFpgaHbmInnovusLinuxLpddrPerlPrimetimePythonQuestaRtlSramSystemverilogTclUnixVcsVerilogVhdlVirtuosoVlsiXcelium
8 Days AgoSaved
In-Office
Richardson, TX, USA
Internship
Internship
Artificial Intelligence • Hardware • Information Technology • Machine Learning
Design and optimize digital, analog, logic, and memory circuits for High Bandwidth Memory products. Support circuit verification, parasitic modeling, simulations, layout, validation, and tape-out activities. Collaborate with global engineering, product, test, process, assembly, and marketing teams to meet performance, reliability, manufacturability, and production objectives. Use AI-assisted tools, scripting, and data-driven methods to improve design analysis and engineering productivity.
Top Skills: Ai-Assisted Engineering ToolsCmosDramFinesimHbmHspicePerlPythonTclVerilog
Entry level
Artificial Intelligence • Hardware • Information Technology • Machine Learning
Designs, simulates, optimizes, and validates digital and analog DRAM memory circuits. Responsibilities include circuit analysis and debugging with SPICE and Verilog, layout parasitic analysis, design rule optimization, test chip planning, silicon validation, characterization, and lab correlation. The engineer collaborates with design, verification, product engineering, test, process integration, assembly, and marketing teams while using AI-assisted technologies to improve engineering workflows.
Top Skills: Ai-Assisted Engineering ToolsCircuit SimulationCmosGenerative AiMemory ArchitecturesSpiceVerilog
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