Top Remote Design Engineer Jobs

Reposted 17 Days AgoSaved
Remote
United States
Mid level
Mid level
Information Technology • Software
The Analog Design Engineer is responsible for designing complex analog circuits, verifying performance, and collaborating with cross-functional teams to enhance efficiencies and provide training.
Top Skills: 1553ArincDdrEthernetFpgaGpioHyperlynxI2CMicrocontrollerPcieSiemens Dx DesignerSpiUart
Reposted 17 Days AgoSaved
In-Office or Remote
7 Locations
180K-300K Annually
Junior
180K-300K Annually
Junior
Artificial Intelligence • Information Technology • Software
The Design Engineer will build and maintain the design system, prototype in React and TypeScript, and ensure design accuracy in product components. They will collaborate with product designers and engineers to enhance product quality using AI tools.
Top Skills: CSSFigmaHTMLReactStorybookTypescript
Reposted 17 Days AgoSaved
In-Office or Remote
2 Locations
Senior level
Senior level
Software
Lead architecture, design, fabrication, testing, and optimization of silicon photonics integrated circuits for coherent long-haul, metro, and pluggable optical systems. Drive PIC specification, link-budget analysis, DFM/DFT practices, cross-functional execution with RFIC/DSP/packaging/foundry partners, and establish simulation and test infrastructures for scalable, high-yield production.
Top Skills: C/C++LumericalPhotonic Integrated Circuits (Pic)PythonSilicon PhotonicsSpectrum AnalyzerVector Network Analyzer (Vna)
Reposted 18 Days AgoSaved
Remote
United States
90K-125K Annually
Senior level
90K-125K Annually
Senior level
Software • Design
The Electrical Design Engineer will design building electrical systems, primarily for healthcare projects, while ensuring compliance with codes and standards. Responsibilities include system design, project coordination, and technical reporting, with opportunities for growth into leadership roles.
Top Skills: AutocadMS OfficeRevit
Reposted 18 Days AgoSaved
Remote or Hybrid
New York, NY, USA
200K-330K Annually
Senior level
200K-330K Annually
Senior level
Artificial Intelligence • Fintech • Machine Learning • Natural Language Processing • Business Intelligence
The role focuses on creating AI-powered design experiences, leading design discussions, mentoring team members, and ensuring product quality through collaboration with cross-functional teams.
Top Skills: AIClaude CodeCodexCSSHTMLJavaScriptMcpReactSkillsTypescript
Reposted 18 Days AgoSaved
In-Office or Remote
Menlo Park, CA, USA
160K-250K Annually
Expert/Leader
160K-250K Annually
Expert/Leader
Artificial Intelligence • Database
Lead the design and development of mixed-signal ICs, overseeing all phases from concept to production, focusing on high-speed interconnects and innovative methodologies.
Top Skills: Analog And Digital DesignCmosFinfetFractional-N SynthesizersHigh-Speed InterconnectsMixed-Signal Ic DesignPam4Serdes
Reposted 18 Days AgoSaved
In-Office or Remote
Menlo Park, CA, USA
160K-250K Annually
Expert/Leader
160K-250K Annually
Expert/Leader
Artificial Intelligence • Database
The MMIC Design Engineer will lead the design and development of THz ICs for AI and hyperscale applications, overseeing the full design cycle and collaborating with teams to achieve project goals.
Top Skills: Analog Functional BlocksEsdGaasGanIii-VInpMixed-Signal Ic DesignSiSigeThz Ic Design
Reposted 18 Days AgoSaved
Remote
United States
185K-225K Annually
Expert/Leader
185K-225K Annually
Expert/Leader
Artificial Intelligence • Information Technology • Consulting
Collaborate on mechanical designs for data center systems, validating performance, overseeing construction, and ensuring designs meet quality benchmarks.
Top Skills: BmsChillersCooling TowersCrahs/CracData Center Mechanical SystemsFansHeat ExchangersHvacMechanical Design SystemsPumpsWater Treatment
18 Days AgoSaved
In-Office or Remote
2 Locations
168K-265K Annually
Senior level
168K-265K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Design and validate embedded SRAM macros at transistor level, supervise layout and verification, develop/automate SRAM compiler flows, explore advanced process-node techniques for optimal PPA, and collaborate with SoC, test, and productization teams to deliver production silicon IP.
Top Skills: Cadence VirtuosoClaude CodeCodexFinfetNanosheetSelf-Timed LogicSense AmplifierSramSram Compiler
19 Days AgoSaved
Remote or Hybrid
3 Locations
180K-230K Annually
Senior level
180K-230K Annually
Senior level
Artificial Intelligence • Information Technology • Robotics • Defense
Translate high-fidelity designs into production-ready, performant UI components and design systems (React/TypeScript). Prototype data visualizations and map interfaces, enforce accessibility (WCAG), iterate from operator feedback, and build tooling to streamline design-to-development workflows for maritime and defense customers.
Top Skills: CanvasCSSDesign TokensFigmaHTMLJavaScriptReactTailwindTypescriptWcagWebgl
25 Days AgoSaved
Remote
United States
140K-175K Annually
Senior level
140K-175K Annually
Senior level
Artificial Intelligence • Cloud • Software • Infrastructure as a Service (IaaS)
Lead assessment and mitigation of security risks in the virtualization stack. Build threat models, rubrics, and defenses; partner with kernel, virtualization, and provisioning teams to design and implement mitigations; mentor engineers, manage vulnerability backlog, and promote security best practices across product teams.
Top Skills: ApparmorAssemblyCCi/CdContainerizationEmbedded SystemsGoKvmLandlockLinux KernelQemuRustSelinuxVirtualization
Reposted 19 Days AgoSaved
Remote or Hybrid
2 Locations
Senior level
Senior level
Software
Design and analyze high-speed analog/mixed-signal circuits including ADCs, DACs, and PLLs in advanced CMOS technologies. Engage in layout optimization and testing plans.
Top Skills: Cadence VirtuosoCalibreEmxIncisiveSpectreTotem Em/IrVerilog-AVerilog-Ams
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Reposted 19 Days AgoSaved
In-Office or Remote
2 Locations
124K-230K Annually
Senior level
124K-230K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Design and verify mixed-signal layouts in sub-micron CMOS technologies, collaborating with ASIC engineers to ensure integration in VLSI products.
Top Skills: CadenceDrcLvsMixed-Signal DesignPerlPythonSkillVlsi
Reposted 19 Days AgoSaved
In-Office or Remote
Philadelphia, PA, USA
80K-115K Annually
Senior level
80K-115K Annually
Senior level
Artificial Intelligence • Cloud
Collaborate with hardware and software engineering to develop and maintain traffic sensor systems, improve operations, and enhance security and performance.
Top Skills: BluetoothCv-2XDsrcFirmware DevelopmentHardware Design
20 Days AgoSaved
Remote
United States
180K-260K Annually
Senior level
180K-260K Annually
Senior level
Defense • Manufacturing
Lead ASIC package architecture and detailed FC-BGA/MCM package designs for high-pin-count, high-speed, power-dense SoCs. Drive package trade studies (SI/PI, thermal, manufacturability, reliability), define standards, collaborate with silicon/RF/systems teams, work with OSATs and substrate vendors, and support qualification and production ramp.
Top Skills: AdsAdvanced LaminatesChipletsFc-BgaHfssInterposersMcmOsatsPdnSerdesSiwaveTim
20 Days AgoSaved
Remote
United States
190K-280K Annually
Expert/Leader
190K-280K Annually
Expert/Leader
Defense • Manufacturing
Lead end-to-end RTL-to-GDSII physical design for high-performance SoCs in advanced FinFET nodes. Own synthesis, floorplanning, P&R, CTS, STA, DRC/LVS and sign-off; develop methodologies and automation to optimize PPA; drive timing closure, coordinate package/SI/PI and DFT, manage external PD partners and EDA tool flows, and support post-silicon bring-up and production for spaceflight-qualified designs.
Top Skills: 2.5D/3D Advanced PackagingCadenceClock Tree Synthesis (Cts)CpfDftDrcEco ImplementationFinfetGate-All-AroundGdsiiIr Drop AnalysisLvsMixed-Signal SocsRtlRtl-To-GdsiiSi/PiSiemens EdaStatic Timing Analysis (Sta)SynopsysTapeoutTsmcUpf
20 Days AgoSaved
Remote
United States
170K-250K Annually
Senior level
170K-250K Annually
Senior level
Defense • Manufacturing
Lead full physical design flow for complex SoC blocks and top-level integration from synthesis to GDSII. Drive timing closure, PPA optimization, physical sign-off (DRC/LVS, IR drop, EM), ECOs and tapeout. Collaborate with front-end, verification, DFT, packaging teams and external vendors, develop automation and methodology, and support products through production and spaceflight.
Top Skills: 2.5D Packaging3D PackagingCadence InnovusChip-Package Co-DesignCpfCtsDftDrcEco ImplementationEm AnalysisFinfetFloorplanningFusion CompilerGate-All-AroundGdsiiIr Drop AnalysisLvsPhysical VerificationPlace And RouteScripting/AutomationStaSynopsys Icc2SynthesisTsmc Sign-OffUpf
Reposted 20 Days AgoSaved
Remote
United States
130K-160K Annually
Mid level
130K-160K Annually
Mid level
Fintech
As a Design Engineer at OnePay, you will create production-ready components, leverage AI tools for efficiency, and collaborate closely with design and engineering teams to innovate design handoff processes.
Top Skills: Ai Coding ToolsFigmaReactReact Native
Reposted 20 Days AgoSaved
In-Office or Remote
2 Locations
Senior level
Senior level
Software
Design and develop silicon photonics integrated circuits, leading the development process from design to testing while collaborating on innovative projects.
Top Skills: C/C++Optical ComponentsOptical EngineeringPythonRf DesignSilicon Photonics
Reposted 20 Days AgoSaved
Remote
United States
200K-300K Annually
Senior level
200K-300K Annually
Senior level
Industrial • Manufacturing
As a Senior ASIC Front-End Design Engineer, you will oversee digital SoC design, collaborating to create automotive communication semiconductors, ensuring target performance and area goals are met.
Top Skills: C/C++MakePerlSystem VerilogTclVerilog
Reposted 20 Days AgoSaved
In-Office or Remote
8 Locations
231K-323K Annually
Senior level
231K-323K Annually
Senior level
Aerospace
Lead the IC packaging team to develop advanced packaging solutions, manage product cycles, and ensure design for manufacturability while collaborating on simulations and qualifications.
Top Skills: 2.5D/3D Em SimulatorsAntenna In PackageCadence Allegro ApdEda Cad ToolsEmxHfssIc Packaging TechnologiesMmwaveMomentumSystem In Package
Reposted 20 Days AgoSaved
In-Office or Remote
2 Locations
Senior level
Senior level
Artificial Intelligence
The role involves synthesizing, placing, and routing high-speed designs, collaborating with RTL teams, and optimizing designs for power/performance area.
Top Skills: CalibreDesign CompilerFusion CompilerIcc2IcvPythonSynopsys Tool SuiteTcl
Reposted 20 Days AgoSaved
In-Office or Remote
New York, NY, USA
200K-280K Annually
Mid level
200K-280K Annually
Mid level
Information Technology • Software
The Design Engineer will build and prototype UI components, contribute to design systems, collaborate across teams, and lead product experience improvement at Polymarket.
Top Skills: FigmaNext.JsReactTypescript
Reposted 20 Days AgoSaved
In-Office or Remote
2 Locations
Senior level
Senior level
Software
Lead architecture, design, fabrication, testing, and optimization of silicon photonics integrated circuits for coherent DWDM long-haul and metro systems. Define PIC architecture and specifications, develop link budgets, drive DFM/DFT and test strategies, lead design reviews, and coordinate cross-functional execution with RFIC/EIC, DSP, packaging, foundry, and test teams to enable high-yield manufacturable coherent transceiver solutions.
Top Skills: CC++DspLumericalPhotonic Integrated Circuits (Pic)PythonRficSilicon PhotonicsSpectrum AnalyzerVector Network Analyzer (Vna)
Reposted 20 Days AgoSaved
Remote
United States
200K-280K Annually
Senior level
200K-280K Annually
Senior level
Defense • Manufacturing
The role involves leading ASIC package design for FC-BGA and MCM solutions, ensuring high-performance mixed-signal/digital SoCs succeed from architecture to production. Responsibilities include trade studies, design standards, and vendor collaboration.
Top Skills: AdsFc-BgaHfssMcmSiwave
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