Top Remote Design Engineer Jobs

Design electrical systems for Block hardware products, collaborate with various engineers, and support manufacturing with occasional travel.

Design circuits and electrical systems for hardware products, collaborate with cross-functional teams, and support manufacturing with 10-20% travel.

As an ASIC Physical Design Engineer, you will develop next-gen mining ASIC, tackle physical implementation challenges, and optimize timing and power.

The UI Engineer will build and maintain robust React components, collaborate with designers and engineers, optimize performance, and contribute to documentation and best practices.

As an ASIC Digital Design Verification Engineer, you will develop and execute test plans for ASIC verification, run simulations, support silicon bring-up, and collaborate across teams on verification processes.

The Senior Circuit Design Engineer will improve netlist and timing quality in deep submicron technologies, collaborate on circuit design, and mentor junior engineers.

The Mechanical Design Engineer develops design solutions for advanced reactor technology, ensuring compliance with safety regulations while collaborating across engineering teams.

As a Design Engineer, you'll create user-focused solutions, collaborate with teams, and enhance the GrowthX platform. You'll lead design projects, refine interfaces, and implement feedback effectively.

The engineer will design and implement I&C electronic hardware for nuclear power plants, manage projects, and ensure compliance with systems lifecycle processes.

As a Lead Design Engineer, you will oversee the Bill of Characteristics, ensuring its integration with quality control plans and leading initiatives to enhance manufacturing processes and quality outcomes in Aerospace.

The Design Engineer will prototype and build web experiences for Stripe, enhancing user engagement and web performance while collaborating closely with designers and engineers.

Responsible for STA timing analysis, developing timing methodologies, collaborating with teams for design constraints, and contributing to chiplet integrations.

Design and analyze circuits for GPUs, lead junior team members, and optimize power and performance using advanced circuit techniques.

The Timing Engineer will perform static timing analysis, optimizing paths and constraints to ensure chip performance while collaborating with various engineering teams.

The Mechanical Design Engineer delivers high-quality mechanical cabinet drawings, develops design specifications, engages customers, and manages project timelines effectively.

Design and verify custom digital hardware components for high-performance computation workloads, collaborating with software teams and conducting functional verification.

The role involves synthesizing, placing, and routing high-speed designs, collaborating with RTL teams, and optimizing designs for power/performance area.

Collaborate with hardware and software engineering to develop and maintain traffic sensor systems, improve operations, and enhance security and performance.

Lead the design and development of precision mechanical systems for UAVs, managing the full design process and collaborating with cross-functional teams.

Design and simulate power delivery solutions and circuits using various tools, mentoring junior engineers and ensuring reliability across systems.

The Senior Mask Layout Design Engineer will perform physical layout for mixed-signal functions, work on ASIC integration, and verify designs against schematics.

As a Payload Design Engineer, you will lead the design and development of space exploration payloads, ensuring safety and functionality for plant growth systems in space. Responsibilities include technical leadership, design reviews, and collaboration with a multidisciplinary team.

As a Senior ASIC Front-End Design Engineer, you will oversee digital SoC design, collaborating to create automotive communication semiconductors, ensuring target performance and area goals are met.

The engineer will perform EM/IR analysis for analog chiplet IP solutions, ensuring design robustness and coordinating with design and layout teams.

The role involves high-speed CPU core integration from RTL to silicon, focusing on PnR, timing, and collaboration for chiplet systems.