Top Remote Hardware Engineer Jobs

The Hardware Engineer - Applications assists in designing electrical controls hardware for material handling systems, prepares estimates and BOMs, and collaborates with various teams.

Lead the development of hardware platforms, collaborate with cross-functional teams, ensure design compliance, and mentor junior engineers in hardware development.

The Principal Hardware Engineer will lead the design of hardware systems for a satellite communications platform, focusing on power distribution, signal integrity, and PCB design, while ensuring high-reliability and fault tolerance in space environments.

As the Founding Hardware Engineer, you will design the hardware for tactile systems in humanoid robotics, focusing on PCB design, firmware development, and partner management.

The Principal Hardware Engineer will design high-speed digital hardware and maintain product integrity, managing designs from concept to production.

The Hardware Test Development Engineer will design test systems for hardware, develop automated test software, maintain documentation, and collaborate with engineering teams to ensure product quality.

Design and implement SystemVerilog RTL for high-speed ASIC compute, memory, and networking subsystems. Define microarchitecture, optimize Power/Performance/Area, collaborate with verification/physical teams, prototype features with architects/software, mentor junior engineers, and improve design flow using AI and automation.

The Senior Package Layout Engineer will collaborate with teams to design IC substrates, optimize layouts, and improve productivity using Cadence tools.

The Hardware Quality Industrialization Engineer will enhance quality processes, manage suppliers, analyze returns, and implement corrective actions in a growing manufacturing team.

As a Senior Hardware Engineer, you'll drive DPU integration into server platforms, execute validation testing, and develop automation for data analysis while collaborating with cross-functional teams and vendors.

The Senior Engineer will develop AI-driven hardware models, assess SystemC simulation efficiency, and integrate modeling with EDA tools.

The role involves designing and developing detailed layouts of IC substrates, collaborating on high speed/density ASIC packages, optimizing pinout, and troubleshooting manufacturing and electrical issues.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

The Senior Mask Layout Design Engineer will perform physical layout for mixed-signal designs, collaborate with engineers, and ensure compliance with design rules.

The Sr. Hardware Design Engineer leads ASIC and FPGA projects, defining architecture, guiding RTL development, and mentoring junior engineers to deliver high-quality silicon solutions.

The Hardware Design Engineer will develop and verify digital designs using SystemVerilog, support hardware bring-up, and collaborate with teams.

The Senior Principal Hardware Systems Engineer leads architecture of high-performance compute platforms, focusing on PCIe design, GPU integration, and system-level development, while managing cross-functional teams and vendor collaboration.

The Hardware Test Development Engineer is responsible for designing test systems, automating the testing process, supporting test software maintenance, collaborating with engineering teams, and documenting testing procedures for hardware products.

The Senior Hardware Support Engineer will ensure production hardware reliability, coordinate vendor diagnostics, lead root cause analysis, and support engineering teams to enhance system stability.

Lead advanced hardware diagnostics and RMA lifecycle management for enterprise servers in production data centers. Perform firmware/BMC/BIOS troubleshooting, root cause analysis, vendor warranty coordination, validate replacements, develop diagnostic playbooks, and drive reliability improvements across the fleet.

Design and verify mixed-signal layouts in sub-micron CMOS technologies, collaborating with ASIC engineers to ensure integration in VLSI products.

The role involves physical layout design for high-speed mixed-signal circuits, collaborating with cross-functional teams, and utilizing various design and verification tools.