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The Principal/Sr Principal Engineer RF Microwave Design role involves designing, modeling, and verifying RF/microwave and mixed signal circuit card assemblies, managing RF budgets, and predicting performance through various analysis and simulation techniques. Candidates must possess strong troubleshooting skills and the ability to lead projects while ensuring adherence to program goals and deadlines.
The Senior Staff Test Engineer Circuit Design will architect new test solutions for mixed-signal/RF IC devices and lead the development of production test solutions. Responsibilities include understanding test requirements, developing software/hardware components, performing validation work, and training peers.
The Principal Integrated Circuit Process Design Kit (PDK) Developer will lead the development of PDKs for foundry technologies, work closely with design and test engineers, and manage PDK documentation and project workflows. Responsibilities include writing scripts, mentoring junior engineers, and interfacing with other foundry roles to enhance process capabilities.
Responsible for designing and analyzing electromagnetic devices, primarily antennas and radomes, developing technical solutions, engaging with engineering teams, supporting design reviews, and creating test procedures and reports for advanced electromagnetic systems.
The Principal/Sr. Principal Research and Advanced Design Test Engineer at Northrop Grumman will support the application of advanced technologies for military use. Responsibilities include developing test plans, overseeing instrumentation, and drafting technical documents. Candidates should excel in dynamic environments and have a strong foundation in test engineering.
The Senior Principal Engineer will develop and execute tests for semiconductor devices, including documenting test plans and creating software and hardware solutions. Responsibilities include maintaining test quality, scheduling, and ensuring compliance with standards, while leading a team of engineers.
The Staff Engineer in RF Microwave Design will develop antenna and receiver architectures, perform RF subsystem analysis, and support performance testing. Responsibilities include requirements generation and verification, as well as leading and mentoring technical teams for complex design challenges.
The Senior Principal Engineer will develop solutions for complex RF/Microwave design and testing challenges, lead technical teams, and utilize advanced software tools in a collaborative environment. They will contribute to all phases of product life cycles and engage in design, testing, and production coordination.
The DFT Engineer at MatX will implement and verify DFT functions for silicon products, collaborating on physical design from RTL to GDS. The candidate will execute DFT solutions, integrate interfaces, and work with partners to ensure production readiness of silicon.
The Software QA Engineer will work alongside the development team to test and ensure the quality of Autodesk's Structural Analysis and Design software. Responsibilities include creating test cases, executing test plans, logging defects, and providing feedback on features from a user perspective. Collaboration with global team members is expected in a hybrid working model.
As a Senior ASIC Design Verification Engineer, you will ensure the verification of digital SoC for advanced automotive communication semiconductors. Collaborate with architects, designers, and SW engineers, while contributing to a cohesive work environment for optimal results.
The Front-End Developer will build and maintain Toku's UI design system, ensuring high performance and responsiveness for web applications. Responsibilities include developing reusable UI components in React.js and translating design mockups into responsive pages using Typescript, HTML5, CSS3, and JavaScript. The role requires collaboration with stakeholders and adherence to coding best practices for maintainability and scalability.
The ASIC/SoC Design Verification Engineer will define and implement test plans for SoC design verification, develop reusable test benches and verification modules, and mentor junior engineers while collaborating with design teams. Key responsibilities include building verification infrastructure and debugging simulation failures, ensuring efficient and effective verification processes.
As a Senior Design Quality Engineer, you will support R&D and Manufacturing Engineering teams by implementing Design Controls, Risk Management, and Process/Production Controls. You will ensure compliance with ISO standards, manage design transfer processes, and collaborate across teams to enhance product quality and reliability.
The ASIC Design Automation Engineer will develop and support design automation tools and methodologies for ASIC development, involving scripting in Bash, Python, Ruby, and TCL, and developing in C++. Responsibilities include debugging design-related issues, providing training, and collaborating with EDA vendors.
The Calcite Design System Product Engineer II is responsible for designing, developing, testing, and supporting Esri's Calcite Design System. This role involves collaborating with designers and developers to ensure a seamless user experience, creating comprehensive documentation, and ensuring components meet accessibility standards. The engineer will also gather user feedback for product improvements and integrate industry best practices to enhance user satisfaction.
The Senior Design Quality Engineer ensures high-quality software products by defining user needs from customer feedback, developing and reviewing Software Requirement Specifications, conducting risk assessments, and collaborating with R&D for safety and usability improvements. Responsibilities also include troubleshooting, customer site visits, and supporting the design process.
Work as a Staff Design Verification Engineer at Marvell, responsible for verifying RTL engineers' designs, running simulations, debugging, and presenting test plans. Requires Bachelor's or Master's degree in Computer Science or Electrical Engineering with 3-5 years of experience.
As a Design Enablement Engineer, you will develop and maintain Process Design Kits (PDK) and support EDA tools, create documentation related to PDK, and ensure safe work practices. The position includes mentorship and training opportunities for new graduates.
The Design Quality Engineer will contribute to design quality deliverables for robotic surgery platforms. Responsibilities include compliance with quality management systems, implementing product design quality and risk management plans, supporting electromechanical design, and collaborating with cross-functional teams. The role also involves maintaining documentation, facilitating communication across divisions, and ensuring compliance with relevant regulations and standards.
The ASIC/FPGA Research Engineer will perform front-end digital design of ASIC or FPGA-based prototypes, working on novel computer architectures and system-on-chip prototypes in a research environment. Responsibilities include supporting research efforts, contributing to design documentation, and potentially overseeing staff and students.
The Sr Staff Engineer will design and develop the PCIe/IO subsystem for a high-performance CPU SoC, create specifications, implement reusable components, ensure integration and performance optimization, and collaborate with various teams for high-quality delivery.
As a Staff Engineer for RTL Design at Tenstorrent, you will implement digital IPs for CPUs and AI/ML chiplets, focusing on RTL coding in Verilog and microarchitecture of security subsystems. You will collaborate with design and validation teams, improve design performance, and debug across various hierarchies.
The Digital DV Engineer at Tenstorrent will be responsible for the verification of digital IP and SOC logic, using advanced methodologies. Responsibilities include creating test plans, writing testbenches, reviewing verification metrics, and conducting performance and power validation of the products.
The Design Assurance Engineer will ensure compliance with quality and design control standards in the development of brain-computer interface technologies. This role involves collaboration with multiple engineering teams, implementation of risk management practices, and oversight of medical device software processes to meet regulatory standards.
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