Top Design Engineer Jobs

8 Days AgoSaved
In-Office
Arlington, TX, USA
160K-195K Annually
Senior level
160K-195K Annually
Senior level
Other
Designs and delivers RF front-end hardware for satellite communication user terminals, from system architecture and circuit design through PCB implementation, prototype validation, environmental testing, and production release. Responsibilities include RF analysis, component selection, simulation, laboratory measurement, performance optimization, calibration, manufacturing test development, documentation, and cross-functional integration. The role also mentors engineers and supports reliable, manufacturable transmit and receive systems.
Top Skills: Adc/DacCadence AwrCommunication Signal AnalyzersEmi/EmcFddKeysight AdsMicrowave EngineeringNoise-Figure AnalyzersOscilloscopesPhased-Array AntennasPower MetersRf HardwareRf Pcb LayoutSatellite CommunicationsSignal GeneratorsSpectrum AnalyzersTddVnas
8 Days AgoSaved
In-Office
Arlington, TX, USA
160K-195K Annually
Senior level
160K-195K Annually
Senior level
Other
Designs compact, embedded, multiband, and wideband antennas for satellite communication user terminals. Owns development from requirements and electromagnetic simulation through prototyping, measurement, environmental verification, integration, and production release. Responsibilities include antenna trade studies, RF structure design, enclosure integration, VNA and chamber testing, simulation-to-measurement correlation, tuning, tolerance analysis, supplier collaboration, documentation, and cross-functional technical leadership. The role also mentors engineers and establishes repeatable antenna verification practices.
Top Skills: Altair FekoAnechoic ChambersAnsys HfssCst Studio SuiteFar-Field Measurement SystemsNear-Field Measurement SystemsOver-The-Air (Ota) Test SystemsRf Front-End SystemsSatellite Communication SystemsVector Network Analyzers (Vnas)
8 Days AgoSaved
In-Office
Long Beach, CA, USA
135K-208K Annually
Senior level
135K-208K Annually
Senior level
Aerospace
Designs, analyzes, and develops propulsion engine components and systems for Rocket Lab’s Archimedes engine. Responsibilities include mechanical design, trade studies, design reviews, manufacturability evaluation, collaboration with analysts and fabrication teams, and supporting hardware from concept through production. The role requires expertise in heat transfer, fluids, structural mechanics, FEA, mechanical design, GD&T, and aerospace hardware development.
Top Skills: Ansys WorkbenchComputational Fluid Dynamics (Cfd)Finite Element Analysis (Fea)Gd&TStarccm+
8 Days AgoSaved
In-Office
Syracuse, NY, USA
75K-100K Annually
Mid level
75K-100K Annually
Mid level
Other • Consulting • Energy
Designs industrial chemical process projects, including engineering studies, conceptual and detailed designs, cost estimates, mass and energy balances, process flow diagrams, P&IDs, equipment specifications, and technical bid evaluations. Coordinates multidisciplinary teams, suppliers, clients, and project activities while supporting design reviews, progress tracking, quality management, and safety initiatives. The role is hybrid in Syracuse, NY and requires 10–30% travel.
Top Skills: ChemcadMass And Energy BalancesMS OfficePipe-FloPiping And Instrumentation Diagrams (P&Ids)Process Flow Diagrams (Pfds)Process Hazard Analysis (Pha)
8 Days AgoSaved
In-Office
Westlake Village, CA, USA
177K-261K Annually
Expert/Leader
177K-261K Annually
Expert/Leader
Artificial Intelligence • Automotive • Semiconductor
Designs and validates high-speed analog and mixed-signal receiver and transmitter ICs for optical and electrical communications. Responsibilities include transistor-level circuit design in CMOS and BiCMOS, broadband front-end development, analog circuit implementation, custom layout, tapeout, lab evaluation, simulation-to-measurement correlation, post-silicon validation, production transition, and customer support. The role also requires collaboration across functional teams and expertise in device physics, feedback stability, and package-system integration.
Top Skills: Analog And Mixed-Signal Ic DesignAnalog Custom LayoutEamEda Cad ToolsFinfet CmosMzmSige BicmosSilicon PhotonicsVcsel
8 Days AgoSaved
In-Office
Cary, NC, USA
154K-286K Annually
Senior level
154K-286K Annually
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Leads mixed-signal physical IP development for high-speed serial links. Designs and verifies circuits from architectural specifications, develops and executes post-silicon test plans, collaborates with digital teams on functional and performance closure, and contributes to validation, testing, and project leadership.
Top Skills: AdcsCCadence Analog Design EnvironmentCdrsDacsDllsHigh-Speed Serial LinksMatlabMixed-Signal Circuit DesignPerlPllsPythonSystemverilogVerilog-A
8 Days AgoSaved
In-Office
Warrendale, PA, USA
Senior level
Senior level
Transportation • Energy • Utilities • Industrial
Leads electrical product design and engineering projects for critical power and UPS systems, including component development, design improvements, technical documentation, testing, manufacturing support, customer issue resolution, and UL product listings. Provides design leadership across internal and external teams, analyzes test data, supports production and quality assurance, and presents technical information to customers and vendors. Travel to customer sites and trade shows may be required.
Top Skills: Battery SystemsCadEngineering Analysis SoftwareMS OfficeSwitchgearTransformersUl Product ListingsUps Systems
8 Days AgoSaved
Remote or Hybrid
6 Locations
108K-184K Annually
Mid level
108K-184K Annually
Mid level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Design and develop physical layouts for silicon interposers used in NVIDIA products. Collaborate with package technical leads, signal integrity and technology engineers, and design teams to deliver package solutions. Conduct feasibility studies, floorplanning, custom layout, design-rule and netlist verification, and layout trade-off analysis. Resolve manufacturing, electrical, cost, and scheduling issues while using Cadence tools and verification flows such as DRC and LVS.
Top Skills: ApdCadenceCalibreDrcIcvIntegrityLvsPerlPythonSkillThunderVirtuoso
Reposted 8 Days AgoSaved
In-Office
2 Locations
63K-238K Annually
Mid level
63K-238K Annually
Mid level
Aerospace • Information Technology • Software • Biotech • Cybersecurity • Quantum Computing • Defense
Design and develop ruggedized electro-mechanical systems through concept exploration, trade studies, prototyping, testing, and delivery. Collaborate with multi-disciplinary teams, produce technical reports, and ensure designs meet harsh-environment and performance requirements.
Top Skills: CadMatlab
Reposted 13 Days AgoSaved
In-Office
Mountain View, CA, USA
99K-198K Annually
Expert/Leader
99K-198K Annually
Expert/Leader
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
Design and verify ASICs and FPGAs for aerospace and space electronics. Responsibilities include RTL design, physical implementation, IP integration, static timing analysis, linting, CDC and LEC checks, UVM-based reusable testbench development, functional and code coverage, FPGA prototyping, and hardware integration testing. The role is fully onsite in Mountain View, California, supports multiple experience levels, and requires U.S. citizenship, U.S. person status, and the ability to obtain a Secret clearance.
Top Skills: Arm IpAsicCdcCvsDsp IpEthernetFpgaGitJesd204CLecLinuxMakePalladiumPciePerlPythonStatic Timing AnalysisSvnSystemverilogSystemverilog AssertionsUvmVerilogVhdl
Reposted 13 Days AgoSaved
In-Office
El Segundo, CA, USA
99K-198K Annually
Expert/Leader
99K-198K Annually
Expert/Leader
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
Design and validate DFT architectures for mission-critical ASICs, including TAP/JTAG, IJTAG, Boundary Scan, MBIST, scan compression, ATPG, and silicon debug. Integrate DFT features into chip design flows, optimize test coverage, develop verification artifacts, support timing and bring-up activities, and collaborate with internal teams and external partners on interfaces and security requirements. The role is fully onsite, with occasional travel and after-hours meetings during critical milestones.
Top Skills: AsicAtpgBoundary ScanBsdlCdcDftFpgaIclIeee 1149.1Ieee 1687IjtagMbistPdlPerlPythonScan CompressionSocStatic Timing AnalysisSystemverilogTap/JtagTclVerilog
Reposted 13 Days AgoSaved
In-Office
North Charleston, SC, USA
104K-171K Annually
Senior level
104K-171K Annually
Senior level
Aerospace • Information Technology • Software • Cybersecurity • Design • Defense • Manufacturing
Design, analyze, test, certify, and support flight control and mechanical hydraulic systems and components for the 787. Translate airplane requirements to system/component requirements, lead design and validation testing, produce certification artifacts, resolve production and fleet issues, perform trade studies and simulations, and coordinate cross-functionally with suppliers, manufacturing, avionics, safety, and customers.
Top Skills: 3D Visualization ToolsetsAdamsC++CameoEasy5MatlabPythonSimscapeSimulink
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8 Days AgoSaved
In-Office
Duluth, GA, USA
Expert/Leader
Expert/Leader
3D Printing
Architects and designs Verilog RTL for digital sections of advanced DDR5, DDR6, and future memory interface chips. Responsibilities include clocking, FSMs, low-power and high-speed design, synthesis, static timing analysis, DFT, formal verification, CDC/RDC checks, logic equivalence, ECOs, and backend design handoff. The role also documents specifications, participates in reviews, defines new features, and mentors junior engineers.
Top Skills: AsicAsynchronous Clock CrossingsAteAtpgCdc/Rdc CheckingClocking ControlsDesign-For-Test (Dft)EcosFinite-State MachinesFormal VerificationGate-Level SimulationIc DesignLintingLogic Equivalence CheckingLogical SynthesisLow-Power DesignMixed-Signal Integrated CircuitsPlace And RouteRtlStatic Timing AnalysisVerilog
8 Days AgoSaved
Hybrid
Duluth, GA, USA
Expert/Leader
Expert/Leader
3D Printing
Architects, designs, verifies, and optimizes CMOS analog blocks and high-speed DDR I/O interfaces for custom ASICs. Responsibilities include analog Tx/Rx, PLL, signal integrity, low-power design, EM/IR and aging reliability, layout oversight, simulation, validation, ATE and bench-data analysis, documentation, and technical mentorship.
Top Skills: AsicsCadence VirtuosoCmosDdr5Ddr6HspiceMaestroMatlabExcelSpectre
Reposted 13 Days AgoSaved
Hybrid
Warren, MI, USA
Senior level
Senior level
Automotive • Big Data • Information Technology • Robotics • Software • Transportation • Manufacturing
Owns electrical systems and components from requirements through design, validation, release, launch, and continuous improvement. Responsibilities include electrical architecture, power distribution, wiring harnesses, controls, interfaces, supplier execution, design reviews, troubleshooting, engineering changes, configuration control, and vehicle build support. The role requires cross-functional collaboration, automotive quality-system awareness, periodic work at proving grounds, travel under 25%, and U.S. person status due to export controls.
Top Skills: Capital LogicDfmeaElectrical SchematicsElectromagnetic CompatibilityEmbedded SystemsNetlistsPfmeaPower DistributionPpapWiring DiagramsWiring Harnesses
8 Days AgoSaved
In-Office
San Jose, CA, USA
187K-271K Annually
Senior level
187K-271K Annually
Senior level
Artificial Intelligence • Internet of Things • Machine Learning
Design and implement DFT architectures for complex semiconductor products, including FPGA, processor, DSP, SERDES, IO, and multi-die designs. Responsibilities include defining specifications, inserting test logic, generating ATPG patterns, applying timing constraints, validating designs pre-silicon, and supporting silicon bring-up and debug. The engineer will collaborate with IP, integration, and test development teams while improving DFT automation, test coverage, manufacturing yield, test cost, and production readiness.
Top Skills: 2.5D/3D Multi-Die PackagingAtpgDebugDftDspEda ToolsFpgaGate-Level DesignIoLbistMbistPerlProcessorsRtlScan InsertionSerdesSimulationStatic Timing AnalysisSynthesisTclTest Compression
One Month AgoSaved
In-Office
Roseville, CA, USA
174K-353K Annually
Senior level
174K-353K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Consulting
Leads architecture, specification, RTL implementation, verification, power optimization, timing closure, and tape-out of high-performance networking ASIC subsystems. Partners across hardware, software, verification, physical design, and product teams to balance performance, power, area, and feature objectives. Drives EDA automation and AI-assisted design methodologies while mentoring engineers and providing technical leadership across the ASIC lifecycle.
Top Skills: Ai AgentsAutomation FrameworksClock-Domain Crossing (Cdc)Ddr4Eda ToolsEthernetFormal VerificationHbm2Hbm2EIpsecLintMacsecPerlPythonSynthesisSystemverilogSystemverilog Assertions (Sva)Verilog
One Month AgoSaved
In-Office
Berthoud, CO, USA
Senior level
Senior level
Aerospace • Defense
Designs, analyzes, qualifies, and documents solid rocket motor structures and propulsion components. Leads clean-sheet design, development campaigns, prototyping, testing, troubleshooting, requirements verification, and design reviews. Creates CAD models and drawings, manages design risks and schedules, supports production scalability and supply-chain planning, resolves hardware discrepancies, and mentors engineers. Requires expertise in solid propulsion, additive manufacturing, structural mechanics, and aerospace design, plus eligibility for a Secret clearance.
Top Skills: AnsysAsme Y14.5-2009Composite OverwrapComputer-Aided Design (Cad)Filament WindingMetal Additive ManufacturingSiemens Nx
8 Days AgoSaved
In-Office or Remote
7 Locations
Junior
Junior
Artificial Intelligence • Hardware • Automation • Manufacturing
Designs and implements DFT architectures and specifications for ASIC/SoC products. Responsibilities include scan insertion, ATPG pattern development, compression and clock-control insertion, optimizing test coverage and power, and pre- and post-silicon verification and debug. The role also requires gate-level simulation, failure analysis, scripting, and collaboration across product teams.
Top Skills: Asic/Soc DftAtpgDft CompressionGate-Level SimulationIeee 1149JtagLbistMbistOn-Chip Clock ControlPerlPythonScan InsertionSdfTclTessent
One Month AgoSaved
Hybrid
Totowa, NJ, USA
145K-247K Annually
Senior level
145K-247K Annually
Senior level
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Designs and supports FPGA products through requirements, architecture, RTL coding, synthesis, place and route, timing closure, simulation, lab testing, debugging, and product support. The role requires expertise in FPGA or ASIC development, VHDL or Verilog, timing analysis, clock-domain crossing, high-speed interfaces, and FPGA development tools. The engineer will collaborate onsite, troubleshoot hardware, support verification, mentor teammates, and may lead design teams.
Top Skills: AdcAsicClearcaseCvsDacDdr2Ddr3Ddr4FpgaGitIntel QuartusLvdsModelsimPciePerlPythonQuestaSerdesShell ScriptingSubversionTclVerilog HdlVhdlXilinx Vivado
8 Days AgoSaved
In-Office
Annapolis, MD, USA
99K-185K Annually
Senior level
99K-185K Annually
Senior level
Aerospace • Logistics • Security • Software • Cybersecurity
Designs complex PCB and flex-circuit layouts, stack-ups, component libraries, drawings, and manufacturing data using CAD tools. Collaborates with electrical and mechanical engineers on placement, routing, manufacturability, impedance, and mechanical fit. Supports component selection, supplier technical queries, documentation reviews, engineering change notices, and PCB workflow improvements. Leads design reviews and interfaces across programs while ensuring compliance with industry, military, fabrication, and manufacturing standards.
Top Skills: CadCcaMentor Graphics XpeditionMil-StdPcbPlmPwb
8 Days AgoSaved
In-Office
Los Angeles, CA, USA
140K-190K Annually
Senior level
140K-190K Annually
Senior level
Hardware • Security • Software • Cybersecurity
Designs and develops multi-GHz RF subsystems for MANET radios, including PLLs, LNAs, mixers, power amplifiers, RFICs, schematics, and PCB layouts. Performs RF characterization, tuning, troubleshooting, EMI and regulatory compliance, production-yield improvements, and design-for-manufacturability work. Collaborates across disciplines in a fully onsite laboratory environment and supports occasional local testing or demonstrations.
Top Skills: AltiumAwr Microwave OfficeLnasMixersPcb LayoutPllsPower AmplifiersRf SimulationRfics
8 Days AgoSaved
In-Office
Santa Clara, CA, USA
164K-269K Annually
Senior level
164K-269K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Designs and develops silicon photonics components and high-speed optical communication systems, including lasers, detectors, modulators, and passive components. Responsibilities include photonic architecture, simulation, tolerance analysis, system modeling, test-chip execution, tapeout, characterization, validation, and performance optimization. The role also conducts research into next-generation photonics technologies and drives intellectual property development for commercial optical communication products.
Top Skills: AdsCmos IcsCoherent Optical SystemsDetectorsDspFecHfssLasersLumericalMatlabModulatorsOptical CommunicationsOptical TestingRf PackagingSemiconductor Optical AmplifiersSerdesSilicon PhotonicsSimulinkVpi
Reposted 8 Days AgoSaved
In-Office
Madison, WI, USA
Senior level
Senior level
Consumer Web • Food • Other • Appliances
Lead the design, validation, and implementation of embedded electromechanical systems for luxury appliances, collaborating with cross-functional teams to meet project deadlines and achieve performance targets.
Top Skills: 3D PrintingC++CadEmbedded SystemsPythonSolidworks
8 Days AgoSaved
In-Office
Milpitas, CA, USA
118K-173K Annually
Senior level
118K-173K Annually
Senior level
Hardware
Designs and develops high-precision multi-axis motion systems for wafer scanning. Responsibilities include CAD modeling, GD&T drawings, structural/thermal/vibration FEA, component selection, prototype testing, system integration, servo tuning, vendor oversight, manufacturing transition, and qualification of wafer positioning stages. Collaborates with controls, systems, and manufacturing engineers to optimize performance, reliability, stiffness, damping, accuracy, and manufacturability.
Top Skills: AccelerometersAir BearingsCreoFeaGd&TLaser InterferometersLinear GuidesLinear MotorsMatlabOptical EncodersPid Servo TuningPythonSimulinkSolidworks
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