Top Design Engineer Jobs

Reposted 2 Months AgoSaved
In-Office
Mount Holly Springs, PA, USA
75K-232K Annually
Expert/Leader
75K-232K Annually
Expert/Leader
Hardware • Semiconductor
The Principal Engineer is responsible for complete project ownership from design to production, including RF and oscillator circuit design for harsh environments and supporting reliability engineering efforts.
Top Skills: Mechanical DesignMS OfficeRf Circuit DesignSimulation ToolsThermal Design
Reposted 2 Months AgoSaved
In-Office
Chandler, AZ, USA
Senior level
Senior level
Hardware • Semiconductor
The role involves designing critical analog and mixed-signal blocks for SoCs, supervising layouts, collaborating on specifications, and validating designs through lab testing.
Top Skills: AdcsCadence VirtuosoCmosDacsMatlabPythonSkillSpectreTcl
Reposted 2 Months AgoSaved
In-Office
Chandler, AZ, USA
91K-232K Annually
Expert/Leader
91K-232K Annually
Expert/Leader
Hardware • Semiconductor
Design and implement low-power wireless SoC solutions from concept to tape-out. Perform RTL coding, synthesis, timing analysis, and collaborate with verification, physical design, validation, and software teams to qualify silicon and optimize power and performance.
Top Skills: AmbaArmAxiBus MatrixCdcDftEthernetFormalFpgaI2CLintMbistMipsOvmPerlPythonRdcRtlSdcSpiSystemverilogTclUsbUvmVerilog
Reposted 2 Months AgoSaved
In-Office
Mount Holly Springs, PA, USA
Mid level
Mid level
Hardware • Semiconductor
Design and optimize PCB layouts for signal integrity, collaborating with various stakeholders and maintaining documentation. Requires experience in PCB design tools and processes.
Top Skills: Altium DesignerAnsys HfssCadence AllegroStructuralThermalXpedition
Reposted 2 Months AgoSaved
In-Office
San Jose, CA, USA
150K-350K Annually
Expert/Leader
150K-350K Annually
Expert/Leader
Artificial Intelligence • Hardware • Software
The DFT Engineer ensures efficient testability of ICs, develops DFT architectures, verifies implementations, and collaborates with teams for optimal production support.
Top Skills: Cadence Encounter TestEda ToolsMentor TessentPerlPythonSynopsys Dft CompilerSystem VerilogTcl
Reposted 2 Months AgoSaved
In-Office
San Jose, CA, USA
150K-350K Annually
Senior level
150K-350K Annually
Senior level
Artificial Intelligence • Hardware • Software
The Design Verification Engineer will ensure all architecture requirements are met by collaborating with vendors and internal teams, developing verification environments, and validating external IPs within chip architecture.
Top Skills: AmbaArcArmAxiEthernetPcieSystemverilogUvm
Reposted 2 Months AgoSaved
In-Office
San Jose, CA, USA
150K-350K Annually
Mid level
150K-350K Annually
Mid level
Artificial Intelligence • Hardware • Software
The Design Verification Engineer will verify performance features in ASIC designs, collaborate with teams, and enhance performance models.
Top Skills: AsicPythonSocSystemverilog
Reposted 2 Months AgoSaved
In-Office
3 Locations
100K-500K Annually
Senior level
100K-500K Annually
Senior level
Hardware • Manufacturing
As a Full-Chip Physical Design Verification Engineer, you will ensure manufacturable silicon by driving full-chip signoff, leading physical verification closure, and collaborating with various teams to achieve successful tapeouts.
Top Skills: AntennaCalibreDfm VerificationDrcErcFcIcvInnovusLvsPegasusPercPythonTcl
Reposted 2 Months AgoSaved
In-Office
New York, NY, USA
95K-209K Annually
Senior level
95K-209K Annually
Senior level
Fintech • Financial Services
Lead the development of a design system, architect web components, manage dependencies, and collaborate with teams to enhance user experiences.
Top Skills: AngularCSSJavaScriptReactTypescript
2 Months AgoSaved
Hybrid
3 Locations
100K-160K Annually
Senior level
100K-160K Annually
Senior level
Other • Consulting
Design electrical systems (power distribution, lighting, telecom, grounding, specialty systems) for Federal and DoD facilities. Perform analysis, prepare construction documents/specifications, coordinate multidisciplinary teams, support field investigations/commissioning, use Revit/BIM and electrical analysis software, mentor junior staff, and support proposals and client engagements.
Top Skills: Agi32BimBluebeamEasypowerElumtoolsMS OfficeRevitSharepointSkmTeams
2 Months AgoSaved
In-Office
Santa Clara, CA, USA
168K-322K Annually
Senior level
168K-322K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
Perform high-speed, high-density PCB layout from component placement through constraints and topology, ensuring signal and power integrity. Produce artwork/ODB++, test reports, and PCB documentation. Ensure designs meet SI, EMI/RFI, IPC, FCC, UL and European regulatory requirements while collaborating with product engineers and troubleshooting complex layout issues.
Top Skills: Cadence AllegroEmi/RfiFccIpcMentor GraphicsOdb++Pcb LayoutSignal IntegrityUl
2 Months AgoSaved
In-Office
Troy, MI, USA
109K-163K Annually
Senior level
109K-163K Annually
Senior level
Automotive
Lead design release for steering wheel and frontal airbag systems: develop functional and technical requirements, manage Tier 1 suppliers, drive CAE/CAD-based development, produce APQP/DFMEA/DVP&R documentation, and support testing and certification to regulatory crash standards.
Top Skills: ApqpAttribute ValidationBomCadCaeComponent TestingDfmeaDrawing ReleaseDvp&RFmvssIihsNcapNhtsaSoftware ReleaseVehicle Testing
New

Track Smarter, Apply Better.

Ditch the spreadsheets. Organize your job search with our freeApplication Tracker.

Use For Free
Application Tracker Preview
2 Months AgoSaved
In-Office
Seattle, WA, USA
165K-185K Annually
Senior level
165K-185K Annually
Senior level
Automotive
Lead frontend development for the Shopify storefront and design system. Build and extend component libraries and theme architecture, enable self-serve merchandising, partner with design and backend teams, optimize performance and accessibility, and deliver seasonal campaigns and commerce features across product lines.
Top Skills: Admin Graphql ApiBlocksCSSFigmaGraphQLJavaScriptLiquidMetafieldsMetaobjectsOnline Store 2.0ReactSectionsShopifyShopify Theme Development ToolchainShopify ThemesStorefront Graphql ApiTypescript
Reposted 2 Months AgoSaved
In-Office
San Antonio, TX, USA
Senior level
Senior level
Hardware • Other • Energy
Lead design, fabrication, installation, startup, and troubleshooting of custom machinery (CNC winders and driven equipment). Produce detailed SolidWorks/AutoCAD fabrication drawings, perform FEA, tolerance analysis, and calculations. Coordinate automation/PLC and hydraulics integration, manage vendors, prepare BOMs and technical packages, estimate costs, and oversee commissioning and maintenance as project lead.
Top Skills: AutocadBills Of Materials (Bom)Design For Manufacturability (Dfm)FeaHydraulic System DesignPlc SystemsSolidworksStructural CalculationsThermal CalculationsTolerance Analysis
Reposted 2 Months AgoSaved
In-Office
2 Locations
Expert/Leader
Expert/Leader
Software
The Verification Architect at SiFive will ensure design fidelity for RISC-V based CPUs, develop verification strategies, and improve quality through collaboration with design teams.
Top Skills: CpuHypervisorInstruction Set DesignMicroarchitectureObject-Oriented ProgrammingRisc-VVerification MethodologiesVirtualization
Reposted 2 Months AgoSaved
In-Office
Chandler, AZ, USA
75K-232K Annually
Senior level
75K-232K Annually
Senior level
Hardware • Semiconductor
Lead digital IP and SoC-level integration for mixed-signal microcontrollers, develop RTL, and oversee verification and integration processes.
Top Skills: CadenceLinuxPerlPythonRtlSiemensSynopsysSystem VerilogTclVerilogWindows
Reposted 2 Months AgoSaved
In-Office
Austin, TX, USA
Senior level
Senior level
Hardware
Design and validate board-level and subsystem electrical designs for server, storage, networking, and rack platforms. Duties include schematic development, component selection, power/signal integrity analysis, bring-up/debug, BOM and ECO support, cross-functional collaboration, and communicating technical status and risks.
Top Skills: BiosBmcBom ManagementMultimetersOscilloscopesPower Integrity AnalysisSchematic Capture ToolsSignal AnalyzersSignal Integrity Analysis
Reposted 2 Months AgoSaved
In-Office
Melbourne, FL, USA
100K-100K Annually
Senior level
100K-100K Annually
Senior level
Aerospace • Logistics • Security • Software • Cybersecurity
Design, develop, test, validate, integrate, and maintain mission-critical workflow management and data integration systems. Build digital thread solutions, custom tooling, and analytics dashboards. Implement Jira/Confluence-based traceability, automate workflows with scripting, lead risk and change management, support production systems, and produce technical documentation and training.
Top Skills: APIsAtlassian JiraConfluenceCSSGroovyHTMLJavaScriptPythonScriptrunnerSQLTableau
Reposted 2 Months AgoSaved
In-Office
Santa Clara, CA, USA
164K-312K Annually
Senior level
164K-312K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Lead end-to-end verification for chassis and interconnect IPs, build scalable UVM/SystemVerilog testbenches, drive simulation/formal convergence and coverage closure, collaborate with architecture/design/software, mentor engineers, and ensure functional signoff and performance/power goals.
Top Skills: AbvAi-Assisted ToolsAmba AceAmba AxiAmba ChiCC++CadCxlEda ToolsEmulationFpgaJaspergoldLow-Power VerificationMl-Driven VerificationPciePhysical DesignPythonRtlSvaSystemverilogTestbenchUcieUvmVc FormalVips
Reposted 2 Months AgoSaved
In-Office
San Jose, CA, USA
180K-255K Annually
Senior level
180K-255K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Natural Language Processing • Software • Generative AI
Own and develop Cadence-based RTL-to-GDS physical design flows for RDU chips. Maintain and enhance Genus/Innovus/Cerebrus toolflows, script automation (TCL/Perl/Python), collaborate with physical designers and tool vendors, and ensure compliance with advanced TSMC node design rules (3nm and below).
Top Skills: Cadence CerebrusCadence GenusCadence InnovusCadence Physical Design Reference FlowPerlPlace And RoutePythonRtl-To-Gds FlowSynthesisTclTsmc 3Nm
Reposted 2 Months AgoSaved
In-Office
Richardson, TX, USA
171K-296K Annually
Expert/Leader
171K-296K Annually
Expert/Leader
Semiconductor • Manufacturing
The role focuses on enabling efficient silicon development through design methodologies, process technology, mentoring engineers, and driving innovation in SoC designs.
Top Skills: Design MethodologiesDesign TechnologyEda Tools (CadencePhysical DesignSemiconductor Process TechnologySiemens)Soc DesignSynopsys
Reposted 2 Months AgoSaved
In-Office
Fort Worth, TX, USA
Junior
Junior
Aerospace
The Associate Engineer will design, develop, and integrate mechanical systems for a fifth-generation business jet, ensuring compliance with specifications and collaborating with cross-functional teams.
Top Skills: Additive ManufacturingAsme Y14.100Asme Y14.5Catia 3Dexperience
Reposted 2 Months AgoSaved
In-Office
Lowell, MI, USA
130K-175K Annually
Senior level
130K-175K Annually
Senior level
Aerospace
Lead innovative aircraft design projects using advanced tools. Focus on systems engineering across disciplines from conceptual design to flight testing.
Top Skills: CadCatiaCfdSiemens NxSolid Works
Reposted 2 Months AgoSaved
In-Office
San Jose, CA, USA
144K-230K Annually
Expert/Leader
144K-230K Annually
Expert/Leader
Software • Semiconductor • Manufacturing
Develop and maintain advanced verification environments using SystemVerilog/UVM/OVM; design UVM agents and behavioral models; implement assertions and coverage; create random and directed tests; debug simulation failures and analyze coverage; collaborate with design teams on SoC/IP verification.
Top Skills: AssertionsCC++Code CoverageEmulatorsFpga PrototypingOvmPerlRtlSystemcSystemverilogUvm
Reposted 2 Months AgoSaved
In-Office
San Jose, CA, USA
144K-230K Annually
Expert/Leader
144K-230K Annually
Expert/Leader
Software • Semiconductor • Manufacturing
Develop and maintain verification environments using SystemVerilog and UVM/OVM; create UVM agents, behavioral models, assertions, coverage; write random and directed tests; analyze/debug simulation failures and coverage; collaborate with design teams to resolve complex verification issues.
Top Skills: AsicBus ProtocolsCC++CoverageCpuDdrDspEmulatorsFpga PrototypingNetwork ProtocolsOvmPerlRtlSocSystemcSystemverilogSystemverilog AssertionsUvm
All Filters
JobType
New Jobs
Job Category
Experience
Industry
Company Name
Company Size

Sign up now Access later

Create Free Account