Top Design Engineer Jobs

The engineer will handle digital ASIC verification, develop and execute test plans, and conduct pre- and post-silicon validation for cutting-edge ASICs at SpaceX.

The Principal Design Verification Engineer will lead ASIC and FPGA verification, develop test plans, and validate designs for Starlink's infrastructure. Significant experience in design verification is required.

The Sr. Mechanical Engineer will design and develop machinery for the Starship production, collaborating with a team to maximize production efficiency.

The role involves digital ASIC verification, writing test plans, executing tests, and contributing to pre- and post-silicon validation for next-generation chips at SpaceX.

Responsible for verification of networking ASICs, including developing test plans, environments, and executing verification processes using SystemVerilog. Requires strong experience in digital design and verification techniques.

As a Mechanical Engineer in Machine Design for Starship at SpaceX, you will design custom machinery and infrastructure, collaborate on vehicle design, perform structural analysis, and create engineering models. Responsibilities include supporting machine activation and manufacturing planning while working in a dynamic team environment.

The Design Verification Engineer will verify digital ASIC designs, develop test plans, automate testing processes, and contribute to chip validation activities.

The principal design verification engineer will lead ASIC verification efforts, ensuring designs meet specifications and are validated through hands-on execution and development of test plans.

Lead electrical system development for cUAS technology, design schematics and PCB layouts, implement firmware, and ensure compliance with safety standards while collaborating with cross-functional teams.

The role involves end-to-end verification of PCIe and CXL subsystems, developing scalable testbenches, and collaborating with cross-functional teams to ensure compliance and performance metrics.

Design, verify, and deliver memory subsystem IP for custom chips. Develop verification plans and environments, analyze simulation failures, and contribute to coverage-driven verification efforts.

The role involves designing and verifying high-speed memory interfaces, developing verification plans and UVM environments, performing protocol-level verification, and collaborating with cross-functional teams to ensure compliance and performance.

The role involves end-to-end verification of PCIe and CXL subsystems, developing and executing comprehensive verification plans, architecting UVM testbenches, validating protocols, improving coverage and performance metrics, and collaborating with cross-functional teams.

The role includes verifying PCIe/CXL subsystems, developing testbenches using UVM/System Verilog, and collaborating with multiple teams to ensure quality and compliance.

The role involves developing verification plans for high-speed memory interfaces, building verification environments, and collaborating with design teams for compliance and coverage closure in ASIC/SoC projects.

Design digital avionics boards for satellites, focusing on high-speed interfaces and FPGA integration while managing power and radiation tolerances.

Design, simulate, and validate high-performance analog and mixed-signal ICs (ADCs, DACs, TIAs, laser drivers) for optical products. Perform SPICE/Spectre simulations, supervise layout and parasitic extraction, develop test plans, participate in silicon characterization and lab debug, collaborate with cross-functional teams, resolve yield and performance issues, document results, and mentor junior engineers.

Lead architecture, design, simulation, layout supervision, and silicon validation of high-performance analog/mixed-signal ICs for optical modules. Define specs, run SPICE/Spectre simulations, oversee layout and test plans, perform debug and root-cause analysis, collaborate across disciplines, mentor junior engineers, and produce detailed design documentation.

The Advanced Lead Engineer will design and optimize inlet and exhaust systems, lead cross-functional teams, mentor members, and ensure technical excellence in alignment with business objectives.

Designs and develops silicon photonics integrated circuits, managing the entire development process, including testing and analysis for cutting-edge photonic devices and systems-on-chip.

The Principal Design Verification Engineer will lead verification strategies, execute high-performance CPU subsystem verification, and improve methodologies, with a focus on CPU core and coherent interconnect verification.

The Staff Design Verification Engineer will lead verification for a cache-coherent interconnect subsystem, focusing on verification planning, execution, and improving methodologies. Key responsibilities include developing robust verification environments and addressing complex verification problems.

The Staff Design Release Engineer will own the design and integration of compute and connectivity subsystems in autonomous vehicles, overseeing technical execution, documentation, and supplier alignment throughout the product lifecycle.

Lead physical design teams for high-performance SoCs, oversee RTL-to-GDSII implementation, mentor engineers, and develop advanced methodologies.

The role involves defining verification strategies for complex SoCs, implementing UVM-based environments, and ensuring full coverage and functional correctness through collaboration with diverse engineering teams.