Top Engineering Jobs

Entry-level highway engineering role on the professional PE track. Perform design computations, produce plans and specifications, prepare technical reports, review submittals, conduct field inspections, ensure code and permit compliance, maintain project documentation, support QA/QC, and work within assigned budgets.

Entry-level highway engineering role on the Professional Engineer track performing design computations, producing plans and technical reports, reviewing submittals, conducting field inspections, ensuring code compliance, maintaining project documentation, supporting QA/QC, and working within project budgets.

Entry-level highway engineering role on the professional PE track performing design computations, plan and drawing preparation, specifications and technical reports, permit/regulatory research, field inspections, and quality-controlled deliverables while supporting project budgets.

Entry-level highway engineering role on an Engineer-in-Training track. Perform design computations, prepare plans and technical reports, review submittals, conduct field inspections, apply codes and standards, and support QA/QC within project budgets.

Lead global backend engineering for HPC SoC and MCU programs from RTL to GDS, ensuring implementation, signoff, PPA targets, and on-time tape-out. Build and scale distributed teams, standardize flows and metrics, improve execution predictability, and partner with foundries, EDA vendors, and cross-functional stakeholders.

Lead design, development, and optimization of low-latency, high-performance algorithmic trading microservices. Implement trading logic and execution strategies, collaborate with product and quant teams, conduct design reviews and code reviews, improve testing/CI/CD, and build monitoring, reconciliation, and recovery solutions while ensuring compliance and risk-aware decision making.

Lead and grow the Hardware Engineering organization, set technical strategy and roadmap, oversee end-to-end hardware projects, recruit and develop engineering talent, drive engineering excellence and process improvements, and partner with Product and senior leadership to deliver high-quality, cost-effective products on schedule.

The Engineering Manager will lead the team in product design, oversee engineering operations, and ensure timely project delivery, translating technical requirements into user-friendly product experiences.

Lead CAD quality reviews, CAD-to-BOM alignment, digital compatibility and design peer reviews. Act as liaison between Engineering, Design, Operations, and Programs to ensure release readiness, reduce rework, and drive CAD process improvements and documentation.

Lead the Interaction Design team at Figma, focusing on improving runtime APIs for interactive experiences, mentoring engineers, and collaborating with product leadership.

Design, simulate, and characterize RF/analog/mixed-signal ICs for space and ground systems. Derive specs, perform floorplanning and layout, model package parasitics, validate prototypes, analyze radio performance, and support test automation and production qualification.

Lead IC layout work for RF and mixed-signal chips, defining floorplans, power/ground distribution and pad placement. Perform block and top-level layout, DRC/ERC/LVS checks, tape-out steps, and collaborate with packaging, EDA vendors, and cross-disciplinary teams. Mentor peers by generating layout guides and drive manufacturability and foundry handoff for advanced-node silicon targeting high-frequency RF blocks.

Lead IC layout discipline for custom RF and analog blocks: floorplanning, power/ground distribution, pad placement, block layout with attention to matching and parasitics, verification (DRC/ERC/LVS), top-level integration, GDS generation and manufacturability checks, tool trials, and documentation.

Design, simulate, and model RF/analog/mixed-signal ICs in SiGe or CMOS for space and ground applications. Derive specs, perform floorplanning and layout, model packages/parasitics, evaluate prototypes, characterize radio performance, develop test lab equipment, and collaborate with systems, DSP, ASIC, and manufacturing teams on production testing and qualification.

Lead cross-disciplinary teams to drive complex ASIC projects from kickoff through production. Manage schedules, suppliers, bring-up, qualification, and ramp-to-production while coordinating with internal and external partners to resolve issues and accelerate silicon deployment.

Design, simulate and model RF/analog/mixed-signal ICs in SiGe or CMOS; derive RFIC specifications; perform floorplanning, layout, and parasitic/package modeling; evaluate and characterize prototypes and full radio performance; develop automated test lab equipment; and work with systems, modem/DSP, ASIC, and manufacturing teams for production testing and qualification.

Design, simulate, and model RF/analog/mixed-signal ICs in SiGe or CMOS for space and ground systems. Derive specifications, perform floorplanning and layout, model package parasitics, characterize prototypes and full radio performance, and support production test qualification and automated lab equipment development.

Design and develop space- and ground-deployable MMICs from spec through production. Simulate, model, package, characterize prototypes, develop test automation, and support production testing and integration with RF systems.

Design, simulate, model, layout and characterize high-speed electro-optical and RF/mixed-signal ICs and photonics (PIC/EIC) for space and ground Starlink systems; collaborate with cross-disciplinary teams, develop test/production qualification, and support automated test lab and manufacturing integration.

Design, test, and qualify RF/microwave circuits, MMICs, RFICs, modules and SiP solutions across cellular to mmWave bands. Develop test hardware and procedures, derive RF system/block specifications, and support production test and debug with manufacturing and customer teams.

Lead IC layout discipline for RF and analog blocks: floorplanning, power/ground distribution, pad placement, custom RF/analog layout, DRC/ERC/LVS checks, top-level integration, foundry tape-out, EDA tool evaluation, and mentoring/guides for layout techniques.

Lead on-chip RF and analog layout for advanced-node mixed-signal ICs, defining floorplans, power/ground distribution and pad placement. Perform custom block layout, DRC/ERC/LVS checks, top-level integration, GDS generation and tape-out. Collaborate with designers, packaging, manufacturing and EDA suppliers; estimate schedules, identify risks, and produce tooling/guides to improve layout practice.

Design, simulate, and analyze photonic integrated circuit building blocks and package optical interfaces. Specify PIC systems, perform IC floorplanning/layout, characterize high-speed electrical and optical components, develop automated test equipment, and support production testing in collaboration with cross-disciplinary teams.

Design and simulate photonic integrated circuit building blocks and optical interfaces; derive PIC specifications; perform IC floorplanning and layout; characterize high-speed optical link electrical and optical blocks; develop test equipment and support production testing and qualification for space- and ground-deployed PICs.

Lead industrial engineering efforts to improve sales conversion, labor productivity, and operational efficiency across store and digital channels. Perform time-and-motion studies, labor standards, workflow reengineering, and omnichannel analytics. Apply Lean, Six Sigma, and Agile methods, present ROI-driven recommendations to leadership, manage cross-functional projects, and mentor a team of engineers and analysts.