Top Remote Hardware Engineer Jobs in Sacramento, CA

The Principal Hardware Engineer will design high-speed digital hardware and maintain product integrity, managing designs from concept to production.

Lead the development of hardware platforms, collaborate with cross-functional teams, ensure design compliance, and mentor junior engineers in hardware development.

Design and develop wireless power transfer and energy-harvesting hardware for IoT and wearable devices. Apply power electronics, RF and electromagnetic theory to create ICs and circuits, integrate solutions into scalable systems, optimize energy efficiency, and drive sustainable innovation for large sensor networks.

The Principal Hardware Engineer will lead the design of hardware systems for a satellite communications platform, focusing on power distribution, signal integrity, and PCB design, while ensuring high-reliability and fault tolerance in space environments.

Designs and executes hardware test strategies for wireless power products. Develops test specs, fixtures, and software; performs component-level troubleshooting; validates product and fixture qualification; documents results and reports issues to stakeholders.

Lead standardization strategy for optical transport and Ethernet technologies, develop and advocate contributions to standards bodies (ITU‑T, IEEE, OIF, OpenROADM), coordinate with PLMs and R&D, report progress internally, provide technical influence and guidance, and represent Nokia at standards meetings and industry events.

As a System Engineer, you'll design, deploy, and maintain cloud systems for AI workloads, troubleshoot complex issues, and collaborate with teams to optimize performance.

As a Senior Hardware Engineer, you'll drive DPU integration into server platforms, execute validation testing, and develop automation for data analysis while collaborating with cross-functional teams and vendors.

The role involves physical layout design for high-speed mixed-signal circuits, collaborating with cross-functional teams, and utilizing various design and verification tools.

Lead reliability strategy and environmental validation for satellite user terminal hardware. Design and run HALT/HASS/ESS tests, oversee weatherproofing and thermal/vibration testing, perform failure analysis (X-ray, microscopy, cross-sectioning), own DFMEA and physics-of-failure models to predict MTBF and warranty risk, collaborate with electrical and mechanical teams and external labs to drive hardware improvements and regulatory compliance.

Design and develop mitigation hardware and complete equipment solutions for moisture and temperature tracking. Create PCBs and system architecture, integrate sensors and embedded/IoT devices with software and billing systems, and collaborate with developers to deliver end-to-end hardware-software solutions in a fast-paced startup environment.

Design and deliver high-power EV charging site electrical systems: develop single-line diagrams, coordinate with utilities and vendors, manage engineering outputs across projects, support field troubleshooting, and ensure code and standards compliance.

Lead on-site technical authority for datacenter hardware reliability and fleet health. Troubleshoot complex hardware failures, drive root cause analysis and corrective actions, coordinate with vendors and cloud providers, establish maintenance standards and runbooks, support new hardware introductions and spare parts strategy, mentor technicians, and analyze failure trends to improve reliability across large-scale GPU and server deployments.

The Senior Package Layout Engineer will collaborate with teams to design IC substrates, optimize layouts, and improve productivity using Cadence tools.

The role involves designing and developing detailed layouts of IC substrates, collaborating on high speed/density ASIC packages, optimizing pinout, and troubleshooting manufacturing and electrical issues.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

The Senior Mask Layout Design Engineer will perform physical layout for mixed-signal designs, collaborate with engineers, and ensure compliance with design rules.

The Sr. Hardware Design Engineer leads ASIC and FPGA projects, defining architecture, guiding RTL development, and mentoring junior engineers to deliver high-quality silicon solutions.

The Hardware Design Engineer will develop and verify digital designs using SystemVerilog, support hardware bring-up, and collaborate with teams.

Design, build, and operate reliable backend systems while mentoring engineers, participating in design discussions, and improving system performance.

The Mechanical Engineer will design and test robotic hardware, develop concepts, create 3D CAD designs, and support testing and integration.

Design and verify mixed-signal layouts in sub-micron CMOS technologies, collaborating with ASIC engineers to ensure integration in VLSI products.