The intern will drive product quality improvements by performing failure analysis, compiling reports, conducting system tests, and collaborating with teams.

The Principal Product Manager will define product requirements, lead customer engagements, and support market strategies for the Taurus Ethernet Retimer portfolio, driving product success in silicon hardware and software solutions.

The Principal Firmware Engineer will architect and develop firmware for SoC and systems, ensuring customer needs are met and working on complex silicon products.

As a Senior Physical Design Engineer, you will lead physical implementation from RTL to GDSII for high-speed designs and ensure timing and power closure, involving collaboration across teams to resolve challenges in advanced technology nodes.

The role involves developing and executing verification plans for PCIe and CXL protocols, collaborating with designers, and utilizing coding and protocol expertise for functional verification.

Lead Software QA Engineer responsible for PCIe switch testing, developing test strategies, automation, and mentoring team members, ensuring quality in data-centric systems.

Oversee the design of connectivity ASICs, coordinating with engineering teams and ensuring timing closure and physical design tasks are met.

Lead the design and development of firmware for CXL memory expansion products. Collaborate with teams, debug systems, and implement low-level firmware.

Design and optimize power delivery systems for ASIC products, ensuring robust integrity and developing board-level designs while collaborating with vendors and teams.

Design layout for advanced node CMOS products including floor planning and circuit integration while minimizing parasitic effects and ensuring compliance with EMIR and DRC rules.

Design and implement high-performance digital solutions, focusing on RTL development, IP integration, and overseeing full-chip designs. Collaborate with teams and ensure design verification and timing closure.

The Firmware Engineering Manager will oversee BootROM firmware development and simulation modeling, ensuring robust integration of security features and hardware/firmware co-design.

The role involves developing firmware for AI infrastructure solutions, collaborating with partners to integrate advanced connectivity technologies into cohesive systems.

The Data Science Engineer will develop data collection strategies, create and deploy data analysis scripts, and ensure data quality while leveraging AI for predictive insights.

The Product Manager will define product requirements, engage with customers to secure design wins, and support go-to-market strategies for semiconductor products in AI infrastructure.

Lead a team of Field Applications Engineers, working with cloud service providers and OEMs to design solutions using Astera Labs' connectivity products, ensuring customer satisfaction and driving product innovation.

The role involves driving business growth through deal management, pricing strategies, customer engagement, and innovation in business processes in the semiconductor industry.

Support existing high volume manufacturing products, ensure on-time customer shipments, and manage engineering during mass production with focus on high-speed product development.

Architect and develop firmware for SoC and systems products, ensuring customer needs are met and responsible for firmware implementation and support.

Design and manage chip layout and integration for high-speed analog ICs, ensuring compliance with EM/IR requirements and DRC rules. Collaborate with cross-functional teams.