Search the 43 jobs at Astera Labs

Design and develop Firmware for enabling technologies like DDR and/or CXL/PCIe for future-looking products. Responsible for implementing major features of products. Requires 5+ years of firmware development experience using C/C++ in embedded environments and 3+ years of DDR training.

Oversee the planning, coordination, and execution supporting the design of connectivity ASICs for cloud service providers and OEMs. Develop/maintain timing constraints, timing signoff methodology, drive designs to production, work with IP vendors, and have scripting skills in tcl, python, or Perl.

Oversee the planning, coordination, and execution of connectivity ASIC designs for cloud service providers and network OEMs. Develop timing constraints, methodologies, closure processes, and drive designs to production. Work with CAD tools, scripting languages, and collaborate with IP vendors for RTL blocks.

Architect and develop firmware and microcontroller subsystems for Astera Labs' SoC and systems products. Collaborate with logic designers on HW-SW interfaces, work with high-speed interfaces in Data Center equipment, and engage in customer-facing activities to ensure customer needs are met.

Support cloud service providers and OEMs by designing solutions using connectivity products, drive innovation, implement customer requirements into product roadmap, and provide hands-on design-in support.

Design and develop Firmware for enabling technologies like DDR and/or CXL/PCIe for future-looking products. Responsible for DDR training, PCIe features, unit-level tests, post-silicon bring-up, and validation of memory interfaces. Base salary range USD 120,000.00 – USD 170,000.00.

Regional Sales Executive responsible for developing account strategies and engaging with leading cloud service providers, server and networking OEMs to design in Astera Labs' portfolio of connectivity products. Key responsibilities include developing a regional sales plan, driving sales efforts, fostering strong customer relationships, and partnering with industry companies. Requires a minimum of 5 years' experience selling complex SoC/silicon products.

Seeking a Sr. Principal Technologist to drive the architecture and definition of future products for data center connectivity solutions. Responsibilities include engaging with customers, influencing product features, and driving innovation in hyperscale data centers.

Seeking a Senior Principal Product Marketing Manager responsible for driving product marketing efforts for semiconductor-based connectivity solutions targeting cloud and AI infrastructure. Key responsibilities include developing marketing strategies, defining product positioning, collaborating with cross-functional teams, leading product launches, and analyzing performance metrics.

The Ecosystem Manager at Astera Labs will be responsible for managing interactions between industry partners, product applications, and digital marketing teams to drive strategic engagement with ecosystem partners and joint marketing events. This role requires in-person presence at the company headquarters in Silicon Valley.

As an Astera Labs Regional Field Applications Engineer, you will lead a team of FAEs as a player-coach to establish the team as trusted technical advisors to the world’s leading cloud service providers, server and network OEMs.

Architect and develop firmware and microcontroller subsystems for Astera Labs’ SoC and systems products. Work on BMC development and BIOS software. Familiarity with PCIe and OpenBMC.

As a Senior Product Manager at Astera Labs, you will lead product definition and launch AI semiconductor solutions for datacenter applications. You will work closely with engineering teams, drive customer discussions, develop go-to-market strategies, and identify new markets.

Design and develop Firmware for enabling CXL/PCIe technologies for future products defined by Astera Labs CXL solutions. Solve problems, understand hardware specifications, and debug PCIe link issues during server boot. Preferred experience in pre-silicon validation, CXL, I2C, SPI knowledge, and server memory or I/O performance.

Seeking SI/PI and System Validation Engineers to work on high-speed connectivity products for AI and ML applications. Responsibilities include SI planning, design, simulation, lab validation, system validation, experiment design, and collaboration with internal customers.

Senior IT Engineer managing and optimizing various services within the Microsoft 365 ecosystem, collaborating with cross-functional teams, ensuring seamless operations, security, and compliance. Implementing cutting-edge platforms to support internal business units and customers.

The Principal Program Manager at Astera Labs leads tactical changes and strategic initiatives for silicon and hardware products in the High Volume Manufacturing phase. Responsibilities include change management, cost reduction, and customer issue resolution. The role requires a Bachelor's or Master's degree in Electronics/Electrical Engineering and 10+ years of relevant experience in product/test engineering, manufacturing, or operations in the electronics or semiconductor industry.

As a Principal Product Applications Engineer at Astera Labs, you will provide technical guidance to customers, generate collateral for products, and drive innovation. You will work with leading cloud service providers, server, and network OEMs, and address challenges with semiconductor products. Strong expertise in NRZ/PAM4 SerDes-based protocols, silicon/system bring-up and debug, high-speed board design, and technical writing is required.

Lead all engineering activities for the development, qualification, and release of ASIC products. Manage program planning, schedules, budgeting, and resource management. Ensure on-time delivery of high-quality ASIC products. Collaborate with cross-functional teams and maintain stakeholder alignment. Drive organizational development and process improvement initiatives.

Astera Labs is seeking a Senior Product Applications Engineering Manager who will provide technical guidance to customers, generate product collateral, and drive innovation. The candidate should have strong academic background in electrical engineering, experience designing semiconductor products with high speed interfaces, and 5+ years of experience in managing a team of applications engineers.