Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Job Summary
We are seeking a motivated and hands-on Tech Lead – Optical Test Engineer to contribute to the development and deployment of optical test solutions for silicon photonics devices and optical modules. This role will support definition of test methodologies, drive key portions of test development, and lead technical efforts within a broader test organization.
The ideal candidate has solid experience in optical testing, strong problem-solving skills, and the ability to collaborate across teams to enable efficient characterization, validation, and production testing.
Key Responsibilities
- Define and implement optical test architectures and test flows across optical wafer probe test, package level test & characterization and optical module validation.
- Execute characterization and qualification testing of CPO components and assemblies.
- Perform high-speed optical measurements including insertion loss, return loss, extinction ratio, eye diagram analysis, BER testing, and optical modulation amplitude (OMA).
- Characterize optical performance parameters such as wavelength accuracy, channel spacing, spectral linearity, and crosstalk for WDM-based CPO architectures.
- Design and build optical test stations incorporating fiber alignment systems, optical switches, tunable lasers, optical spectrum analyzers, high-speed oscilloscopes, and BER testers.
- Develop test automation software, automated test scripts & frameworks using Python, LabVIEW, MATLAB, or similar platforms.
- Implement high-throughput test solutions suitable for wafer-scale and production-level testing.
- Analyze large-scale optical test data to identify trends, failure modes, and yield-limiting factors.
- Generate statistical reports (Cpk, GR&R, SPC) to monitor process stability and test repeatability.
- Collaborate with design and process engineering teams to provide feedback for performance optimization.
- Create and maintain test documentation, SOPs, and knowledge base articles.
- Interface with external suppliers and foundries on silicon photonics wafer-level test requirements.
- Participate in design reviews to ensure testability and provide DFT (Design for Test) recommendations.
Required Qualifications
- M.S. or Ph.D. in Electrical Engineering, Optical Engineering, Physics, Photonics, or a related discipline.
- 5–7+ years of experience in optical testing, photonic device characterization, or optical transceiver development.
- Strong understanding of silicon photonics devices (modulators, photodetectors, multiplexers, grating couplers, edge couplers).
- Hands-on experience with optical test equipment: OSA, OMA, tunable lasers, polarization controllers, power meters, high-speed real-time oscilloscopes, BERT/pattern generators.
- Proficiency in high-speed optical link testing (100G/lane and above, PAM4, NRZ).
- Programming skills in Python, MATLAB, LabVIEW, or C/C++ for test automation.
- Knowledge of optical communication standards (IEEE 802.3, OIF-CEI, CMIS).
- Familiarity with statistical analysis methods and data visualization tools.
Preferred Qualifications
- Experience specifically with co-packaged optics or on-board optics architectures.
- Experience with wafer-level optical probing and testing tool hardware & software as well as automated photonics test platforms.
- Experience in transitioning test processes from lab/prototype to high-volume manufacturing (HVM).
Salary range is $185,000 to $240,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Skills Required
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- 5+ years of digital design experience, including at least one full chip from spec to tapeout
- Proficiency in Verilog/SystemVerilog, RTL coding, and synthesis flows
- Hands-on experience with timing closure, CDC, lint, and low-power design techniques
- Understanding of high-speed serial interfaces (PCIe, Ethernet, or similar) and SoC integration
- MS or PhD in Electrical Engineering or Computer Engineering
- Experience with PCIe Gen5/Gen6, CXL, UALink, UCIe, or Ethernet MAC/PCS designs
- Familiarity with formal verification, emulation, or assertion-based methodologies
- Background in advanced process nodes (7nm, 5nm, or below)
- Strong debug skills across pre-silicon and post-silicon environments
Astera Labs Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Astera Labs and has not been reviewed or approved by Astera Labs.
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Healthcare Strength — Health plans are described as competitive and employer-subsidized, covering medical, dental, and vision for employees and dependents. Company materials and listings consistently emphasize strong core healthcare coverage.
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Leave & Time Off Breadth — Flexible time off is highlighted alongside paid company holidays, with guidance indicating generous PTO when coordinated with teams. Documented policies also point to robust time-off structures across locations.
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Equity Value & Accessibility — Stock-based compensation is a meaningful part of total pay, with RSUs and an employee stock purchase plan noted as part of the package. Public-company status enhances perceived value and accessibility of equity components.
Astera Labs Insights
What We Do
Astera Labs Inc., a fabless semiconductor company headquartered in the heart of California’s Silicon Valley, is a leader in purpose-built connectivity solutions for data-centric systems throughout the data center. Partnering with leading processor vendors, cloud service providers, seasoned investors, and world-class manufacturing companies, Astera Labs is helping customers remove performance bottlenecks in data-intensive systems that are limiting the true potential of applications such as artificial intelligence and machine learning. The company’s product portfolio includes system-aware semiconductor integrated circuits, boards, and services to enable robust CXL, PCIe, and Ethernet connectivity.
