Teams at Astera Labs

The Senior VLSI Design Engineer will design and implement digital blocks for complex semiconductor chips, tackling logic challenges and ensuring robust performance in AI infrastructure solutions.

As a Senior Physical Design Engineer, you will oversee the physical implementation of complex semiconductor designs and guarantee their performance and integrity.

Senior Design Verification Engineer responsible for developing and executing UVM/SystemVerilog verification environments, integrating C/C++ via DPI/PLI, creating constrained-random tests, writing assertions and coverage, using third-party VIPs (PCIe, Ethernet, NVMe, DDR, etc.), automating infrastructure with scripting, and collaborating with RTL designers to debug SoC silicon for server, storage, and networking applications.