Top Remote C++ Jobs in Houston, TX

You will develop and maintain components of the LLVM based toolchain, collaborating with the community while ensuring platform-specific optimizations and tests.

The Senior Software Engineer will design and develop IMS TM and DB-compatible technologies, providing architectural leadership and mentoring while optimizing mission-critical applications for modern environments.

Customize and configure ServiceNow applications and workflows, manage releases and environments, analyze system interactions, gather and document requirements, develop integrations and import data, troubleshoot issues, and maintain processes, standards, and tools to support Service Transformation and IT operations.

Lead the on-vehicle autonomy team to design, build, integrate, and field autonomy software for autonomous surface vessels. Own navigation, planning, control, behaviors, safety logic, and autonomy execution; drive architecture, testing, simulation, HIL, field deployments, and cross-functional integration while mentoring engineers and ensuring mission-ready, maintainable autonomy systems.

Lead implementation of software safety programs for underwater robotic/autonomous vehicles per MIL-STD-882. Produce safety plans and assessments, perform hazard analyses, track coverage metrics, catalog safety artifacts, review software independently, and present findings at reviews and customer meetings. Coordinate across programs and support demanding schedules with occasional travel.

Lead verification of custom ASIC/SoC from block to full-chip: develop verification plans, build SystemVerilog/UVM testbenches, run constrained-random and directed tests, use SVA and formal methods, manage regressions and CI, drive coverage closure, support post-silicon bring-up, and influence DV methodology across cross-functional teams.

As a Postgres Deployment Engineer, you will manage PostgreSQL lifecycles, optimize CI/CD systems, resolve production issues, and mentor teammates. You will focus on deployment stability and enhance developer tools.

Own and advance a core Helius backend system supporting Solana infrastructure. Design and release high-performance products, optimize latency and throughput, make architectural decisions, improve observability and incident response, and mentor engineers. The role requires end-to-end ownership of production systems at scale, with close collaboration with founders and engineering leadership. Relevant systems include data streaming, historical APIs, account indexing, and access control infrastructure.

Own the technical direction of a core Helius backend system, including architecture, reliability, performance, roadmap, and production operations. Design scalable distributed systems, storage, streaming, or edge infrastructure; drive profiling and performance improvements; establish operational excellence; partner with founders on strategy; mentor engineers; and lead ambiguous cross-team initiatives.

Lead Elasticsearch performance engineering from architecture through production. Develop performance models, optimize distributed systems, profile bottlenecks, build benchmarks, detect regressions, and improve scalability across stateful and serverless architectures. Design AI-assisted optimization and benchmarking tools, collaborate across teams, define performance strategies, and mentor engineers. The role requires deep Java, JVM, concurrency, distributed systems, and search or data-store performance expertise.

Develop and optimize Elasticsearch performance across distributed and serverless architectures. Responsibilities include implementing performance models, profiling systems, identifying bottlenecks, building benchmarks and regression detection, improving logging, metrics, vector search, and ES|QL performance, and creating AI-assisted optimization tools. The role also involves architectural and code-level optimization, technical analysis, peer reviews, and guidance for fellow engineers.

The Forward Deployed Engineer collaborates with customer teams to design, prototype, and troubleshoot real-time communication and voice AI applications on the LiveKit platform.

Lead development of spacecraft Guidance, Navigation, and Control systems through full lifecycle: requirements, design, simulation, algorithms, flight software, and verification. Develop simulation tools, drive reuse of heritage Airbus products, support subsystem requirements and integration, and optimize designs for cost, manufacturability, and testing. Collaborate cross-functionally across spacecraft, payload, and launch integration activities.

Participate in TI's Career Accelerator Program to develop as a product, test or validation engineer. Design, build, qualify and support analog and embedded IC products; develop test software/hardware, debug devices, optimize tests, support yield and cost projects, resolve customer quality issues, and collaborate with manufacturing and cross-functional teams.

Optimize end-to-end GPU performance for real-time autonomous driving workloads: develop and optimize parallel GPU algorithms and inference pipelines, profile and eliminate bottlenecks across computation and memory, debug GPU software for latency/throughput improvements, and collaborate on onboard GPU software architectures for embedded platforms.

As a Datacenter System Software Architect at SiFive, you'll design RISC-V Linux systems for datacenters, engage with customers, and optimize performance across software and hardware.

The Firmware Engineer will design and implement firmware for the Roadio camera system, develop driver-level and application-level firmware, and work with mobile teams to ensure low-latency functionality in embedded systems.

Lead mission formulation and architecture for EO/IR and persistent infrared/MW missions. Perform mission-level analyses, define requirements and top-level budgets, design payloads and constellations, run trade studies using software/code, and coordinate with instrument, engineering, and science teams to deliver cost-effective space mission solutions.

Develop and maintain embedded firmware and kernel/user-mode device drivers for Ethernet-based networking devices. Design, implement, test, and integrate drivers into a Linux and AUTOSAR communication stack, build SDK components, and create debug/test utilities and automated unit/system tests for safety-critical automotive applications.

Lead mission formulation and architecture: develop mission concepts from customer needs, perform mission-level analyses and top-level budgets, define requirements and design for spacecraft and RF/optical instruments, run engineering trade studies using code/tools, evaluate constellation configurations, and coordinate across disciplines.

Own design, implementation, and production support of Windows kernel-mode enforcement drivers (filesystem, process/thread, handles, registry) and the kernel/user-mode enforcement boundary. Reduce enforcement latency at scale, extend enforcement to containers and isolation, ensure compatibility across Windows builds, handle driver signing and deployment, collaborate cross-platform on policy and the Rust userspace agent, and mentor engineers while driving technical direction and operational stability.

Work as the US-based technical face for Bitmovin's Encoding team: contribute production C++/Java/Kotlin code, triage and resolve customer encoding incidents during US hours, run on-site integrations and workshops, and feed field learnings into sprint planning and the product roadmap.

Build and maintain the GG App across Windows, macOS, and iOS including installers, background services, auto-update systems, enterprise deployment paths, health reporting, AWS backend, and documentation. Lead architecture decisions, mentor engineers, participate in on-call support, and champion AI adoption and automation across engineering.

Participate in full SDLC building and integrating software for DoD customers. Develop C++/Python systems, curate synthetic geospatial raster data, apply TDD, operate in DevSecOps pipelines, and use containerization and CI/CD for deployment and testing.

Define and execute verification plans for block-to-full-chip ASICs using SystemVerilog/UVM. Build testbenches, assertions, constrained-random and directed tests, manage regressions and CI, run simulations, triage failures, close coverage, and support silicon bring-up and post-silicon debug while collaborating across architecture, RTL, DFT, firmware, and physical design teams.