Top Internships in Boise, ID

Assist with DRAM devices from design through mass production by analyzing electrical and physical failures, identifying semiconductor fabrication defects, mining data with statistical and AI-assisted tools, automating workflows, determining root causes, and communicating findings to cross-functional engineering and management teams during a three-month internship.

Intern will analyze semiconductor experimental process flows, identify defect anomalies, quarantine out-of-control tools, and use inline process signals to improve yield and equipment performance. The role involves process anomaly investigation, root cause analysis, data manipulation, correlation analysis, AI and LLM applications, and development of inspection strategies. The intern will collaborate with process control, data science, yield analysis, and metrology engineers while optimizing measurement and detection techniques.

Support development of next-generation DRAM by defining integration requirements, coordinating multi-functional teams, leading module integration activities, identifying technical risks, developing test plans, evaluating alternative architectures and using AI-assisted and data-driven methods to improve engineering analysis and decision-making.

Industrial Engineering Intern supporting Micron’s automated R&D factory. Responsibilities include identifying performance indicators, extracting and analyzing planning data, creating Tableau reports, designing infographics, and exploring workplace applications for AI. The role requires data extraction and visualization skills, with exposure to manufacturing, supply chain, and program management.

Interns will design, mature, and optimize semiconductor wet-process equipment; conduct experiments, develop hardware and analytical techniques, analyze statistical data, validate equipment capabilities, and solve engineering problems. The role emphasizes safety, technical presentation, independent work, collaboration, and incorporating AI into daily tasks.

Work with engineers and scientists to develop and optimize CMP processes and chemistries for future semiconductor nodes using experimentation, characterization, data analysis, and AI-enabled tools. Prepare technical reports and present findings to R&D teams while supporting process capability, productivity, contamination control, and surface/interface characterization improvements.

Hands-on SkillsBridge internship supporting preventive and corrective maintenance of semiconductor manufacturing equipment. Troubleshoot mechanical, electrical, pneumatic, and vacuum subsystems using technical documentation and SOPs. Support equipment installations, upgrades, and qualification activities while following cleanroom, safety, and quality protocols. Partner with technicians, engineers, and operations teams to meet manufacturing goals and gain career-ready technician experience.

Internship focused on developing semiconductor metrology processes and measurement technologies. Responsibilities include designing and running cleanroom experiments, analyzing semiconductor metrology data with Excel and JMP, evaluating new tools, optimizing measurements with process engineers, and supporting next-generation technology development and fab transfers. The role also applies data science, AI, and machine learning to metrology analysis and workflow improvement.

Semiconductor yield analysis internship focused on reviewing experimental data, identifying device performance shifts and process anomalies, improving measurement accuracy, and using inline data and machine learning to predict cell performance. The intern will collaborate with process integration, process engineering, and data science teams while developing root-cause analysis, process improvement, and technical communication skills.

Develop and optimize wet cleaning and resist strip processes for EUV and DUV photomasks. Design experiments, analyze defect, contamination, yield, and equipment data, characterize process equipment, evaluate tool matching, and support qualification and corrective actions. Apply statistical analysis, data science, and machine learning to identify process trends and improve yield. Lead an independent project and present technical recommendations to engineering teams and leadership.

Semiconductor engineering intern supporting physical failure analysis and yield enhancement for DRAM, NAND, and emerging memory devices. Responsibilities include electrical testing, wet and dry device delayering, FIB cross-sectioning, STEM/TEM analysis, SEM operation, image generation, and identifying failure mechanisms for process improvement. The role also develops problem-solving skills and may apply AI-enabled methods and software development to failure analysis.

Support development of next-generation 3D DRAM technologies by designing and analyzing experiments in an R&D fabrication environment. Responsibilities include evaluating memory structures and thin-film transistors, analyzing inline, electrical, and probe data, identifying variability and reliability risks, and collaborating with cross-functional engineering teams to improve performance, yield, and manufacturability. The intern will also use approved AI tools for engineering analysis and technical productivity.

PhD internship on 3D DRAM wet-process development. Contribute to process optimization, root-cause analysis, and yield improvement. Analyze experimental and manufacturing data using statistical methods and AI/data-driven approaches. Collaborate with cross-functional process and equipment teams and deliver a project presentation of findings and recommendations.

Supports wet etch process development for next-generation semiconductor technologies through experiments, chemistry development, contamination reduction, surface characterization, and data analysis. Collaborates with engineering teams to improve process capability, productivity, efficiency, and manufacturability. Communicates findings through technical reports and presentations while applying AI-enabled and data-driven methods to optimize research and analysis workflows.

Supports EUV lithography and materials engineering projects for next-generation semiconductor manufacturing. Responsibilities include designing DOE experiments, conducting cleanroom process development, optimizing photoresist and patterning performance, analyzing CD-SEM and imaging data, applying AI and data-driven methods, and presenting technical findings. The intern collaborates with photolithography, metrology, etch, wet-process, and other engineering teams across multiple project assignments.

Intern supporting thin-film deposition and metallization process development for DRAM manufacturing. Responsibilities include designing experiments, analyzing statistical and metrology data, optimizing processes, investigating excursions, performing root-cause analysis, qualifying tools, evaluating materials, reducing defects, and developing AI-assisted or automated engineering workflows. The role provides hands-on exposure to semiconductor manufacturing, cleanroom operations, and cross-functional engineering collaboration.

Contribute to DRAM process integration R&D by defining design rules and specs, collaborating across device, materials, and process teams, documenting integration plans and risks, evaluating architectures and scaling approaches, and using AI/AI-assisted tools and statistical methods to support technology development.

Support development and optimization of photolithography processes (including EUV) by designing and running experiments in a cleanroom, analyzing process images and data with commercial/in-house tools and AI methods, and reporting findings to cross-functional teams to improve overlay, CDU, and process windows.

Design and analyze digital and analog circuits for DRAM/memory products. Apply artificial intelligence methods to support design and analysis. Participate in semiconductor product development and collaborate with engineering teams to advance memory solutions.

Support development and optimization of dry etch semiconductor processes through experiment design, data/statistical analysis, AI-enabled tools, and cross-functional collaboration; present results to engineering leadership.

Conduct hands-on semiconductor dry etch process development: design and run experiments, analyze statistical and manufacturing data, collaborate with cross-functional teams, apply AI or programming tools to optimize processes, and present technical results to engineering leadership.

Manage three branded Reddit accounts: post 2–3 times per week per brand, engage with users and comments per brand guidelines, craft brand-specific Reddit strategies, and coordinate with an outside contractor to manage meetings and goals.

Support design, development, and verification of digital DRAM IP using RTL-to-GDS flows. Perform PVT circuit analysis, develop automation scripts, apply AI-assisted tools, collaborate across functions, and present technical findings to leadership.

Work with DRAM verification teams to plan and run simulations, analyze datasheets, debug designs, perform coverage and timing analysis, and apply AI/automation to improve verification workflows. Collaborate with global design and verification teams to support product development and modeling efforts.

PhD-level intern will develop and evaluate CMP processes for advanced DRAM, run experiments, apply root-cause analysis and statistical/AI-assisted data analysis, partner with cross-functional teams, and present technical project results.