Jobs at Ixana

Perform RTL integration of IPs and subsystems into top-level SoCs, develop RTL wrappers, interconnect, clock/reset infrastructures; run lint/CDC/early synthesis checks; debug simulation and synthesis issues; automate and maintain integration flows with Python/Perl/Tcl; collaborate with design, verification, and physical design teams and contribute to design reviews and documentation.

Manage on-site office operations, vendor coordination, procurement, and facilities upkeep. Provide first-line IT support, maintain Wi‑Fi, access control, asset inventory, onboarding/offboarding accounts, and coordinate logistics for shipping, events, and team travel.

Plan and execute end-to-end RTL verification for SoCs and IPs using SystemVerilog and UVM. Build testbenches with functional coverage and assertions, perform gate-level and power-aware verification, debug waveforms, script automation, and collaborate with design, architecture, and system teams to deliver silicon.

Design and lead development of miniaturized PCBs for wearable devices using custom Wi-R ICs and COTS components. Create schematics and layouts, perform board-level testing and debugging, collaborate on packaging, and support prototype validation and test automation.

Design, analyze, and tape-out low-power mixed-signal and RF circuits for wearable communication chips. Integrate analog IP into SoCs, verify and validate designs, collaborate with firmware/board/testing teams, and perform lab validation from schematic through layout and tape-out.

Develop Python applications and testing scripts for Wi-R reference hardware, including smartglasses, earbuds, wearables, EEG and EMG nodes, and health-monitoring devices. The role involves backend development, AWS server deployment, embedded programming, low-level hardware interfacing, firmware debugging, hardware compatibility validation, and test automation. Candidates should understand IoT systems, communication protocols, electrical test equipment, CI/CD, and virtualization or container technologies.

Lead design, simulation, prototyping, and launch of wearable embedded hardware. Own schematics, multilayer PCB layout, system integration, component selection, validation, bring-up, and cross-functional coordination for smart devices.

Design and lead bare-metal bring-up and low-power firmware for Wi-R SoCs and Cortex-M/RISC-V platforms. Build and optimize firmware stacks (I2C, SPI, BLE, DMA, sensor drivers), deliver a production SDK, debug at register level with JTAG/oscilloscopes, and mentor junior engineers while contributing to toolchain and quality standards.

Lead architecture and execution of next-generation wearable Wi-R SoCs. Build and manage an IC design team, own RTL-to-GDS tape-outs, drive analog/RF front-end and mixed-signal integration, define verification/IP reuse methodology, and coordinate silicon validation, packaging, and product co-optimization with cross-functional teams.

Lead end-to-end analog/mixed-signal IC design from specification to tapeout, drive circuit innovation to meet power/performance/area goals, collaborate with digital/layout/product teams, recruit and mentor engineers, own technical decision-making, and oversee board-level bring-up, test automation, and PCB design for production at scale.

Work on designing, simulating, and prototyping ultra-low-power wearable and biomedical hardware. Support schematic capture, multilayer PCB layout, component selection, system integration, bring-up, validation, and testing for devices like smartglasses, rings, and watches while collaborating across design, product, and supply chain teams.

Work on embedded hardware and FPGA-based wearable systems: assist with schematic capture, multilayer PCB layout, component selection, prototyping, board bring-up, validation, testing, and debugging. Support FPGA implementations for signal processing and interface logic while collaborating with product, industrial design, and supply chain teams.