Product Manager – Silicon Strategy & Security (On-site. Bengaluru, India)

Posted 3 Days Ago
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Bengaluru, Bengaluru Urban, Karnataka, IND
In-Office
Junior
Artificial Intelligence • Hardware • Wearables • Semiconductor
The Role
Own the silicon security product vision, roadmap, requirements, and execution from concept through production. Define hardware and firmware security features, IP protection, personalization, key injection, licensing, and traceability strategies. Coordinate engineering, business, legal, sales, and customer teams while managing early-access programs, adoption metrics, pricing, positioning, and go-to-market activities.
Summary Generated by Built In

Product Manager – Silicon Strategy & Security | Build secure silicon for the next era of human-computer interaction

On-site – Bengaluru, India

We provide comprehensive relocation support for professionals based outside Bengaluru.

About Ixana

Ixana is a Purdue University spinoff pioneering brain-inspired wearable computing. We've developed Wi-R, a patented communication tech that's 100x more energy-efficient than Bluetooth or Wi-Fi. Join our 60-person team building the next era of real-time, AI-powered human-computer interaction.

The Wi-R Revolution

Wi-R is our patented non-radiative near-field communication technology that creates secure "wire-like wireless" experiences through small E-field bubbles around your body. This breakthrough enables unprecedented energy efficiency at sub-0.1 nanojoules per bit, making long-term wearable and implantable devices finally practical.

See Wi-R in action: Visit ixana.ai for demos of high-speed data streaming through skin contact: https://vimeo.com/ixana/pairing-contact-transfer

What You’ll Do

Product Strategy & Roadmap

  • Define product vision and north-star metrics (e.g., security feature adoption, counterfeit prevention, secured revenue)

  • Build and own the 12–18 month roadmap balancing performance, power, area, security, yield, and cost

  • Author clear PRDs/MRDs and drive prioritization across engineering and business teams

IP Protection Strategy

  • Define and drive silicon and firmware security features: UID (eFuse/OTP), PUF, secure boot, attestation, JTAG lockdown, obfuscation, watermarking

  • Establish factory personalization, key injection, licensing/activation flows, and traceability systems

  • Partner with Legal/IP teams on patents, licensing strategy, and competitive intelligence

Execution & Customer Impact

  • Drive cross-functional execution from concept → tape-in/tape-out → production

  • Manage early access programs (EAPs) and beta deployments with key customers

  • Track adoption metrics and security outcomes; publish dashboards and insights

  • Enable Sales/FAE teams with positioning, pricing, and go-to-market strategies

What we are looking for

Required:

  • MBA from a Tier-1 institute (IIM or equivalent)

  • 2+ years of hands-on experience in chip/VLSI/EDA domains (Analog, RTL, SoC, DV, DFT, or firmware)

  • Strong ability to write PRDs, define success metrics, and drive trade-offs across security, PPA, and cost

  • Working knowledge of hardware security fundamentals (UID/OTP, PUF, secure boot, debug security)

  • Strong cross-functional leadership and communication skills

Preferred:

  • Prior experience as a Product Manager or TPM in semiconductors, EDA, or embedded security

  • Exposure to yield/debug flows, reliability engineering, or failure analysis

  • Experience with analytics tools (SQL) and product telemetry

  • Familiarity with tools like Jira, Confluence, Git

  • Patents or publications in relevant domains

Compensation & Benefits

  • Competitive CTC with performance-based bonus

  • Meaningful early-stage equity (ESOPs)

  • Comprehensive health insurance coverage

  • Flexible/hybrid work options

  • Learning and development budget

  • Conference sponsorships and industry exposure

Why Join Us

  • Work on deep tech that truly matters

  • Build secure silicon systems at the frontier of hardware and AI

  • Collaborate with world-class experts across chip, wireless, and embedded domains

  • Operate with high ownership alongside founders and senior leadership

  • Drive real-world impact through products that scale globally

Ready to re-wire the future of human-computer interaction?

Apply via our careers page. In your note, tell us how you would approach building secure silicon systems and protecting IP in next-generation hardware platforms.

Ixana is an equal opportunity employer committed to advancing human-computer interfaces through innovative low-power electronics.

Keywords:

Product Management, Semiconductor Strategy, Hardware Security, Silicon Product, SoC, VLSI, IP Protection, Secure Boot, PUF, Cross-Functional Leadership

Skills Required

  • MBA from a Tier-1 institute, such as IIM or equivalent
  • 2+ years of hands-on experience in chip, VLSI, or EDA domains, including Analog, RTL, SoC, DV, DFT, or firmware
  • Ability to write PRDs, define success metrics, and drive trade-offs across security, performance, power, area, and cost
  • Working knowledge of hardware security fundamentals, including UID/OTP, PUF, secure boot, and debug security
  • Strong cross-functional leadership and communication skills
  • Prior Product Manager or Technical Program Manager experience in semiconductors, EDA, or embedded security
  • Exposure to yield and debug flows, reliability engineering, or failure analysis
  • Experience with SQL and product telemetry
  • Familiarity with Jira, Confluence, and Git
  • Patents or publications in relevant domains
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The Company
72 Employees
Year Founded: 2021

What We Do

Ixana is a Purdue University spinoff and fabless semiconductor company pioneering brain-inspired wearable computing. The company develops Wi-R, a patented E-field wireless technology that provides ultra-low power, high-bandwidth connectivity for wearables, AR/VR, robotics, and industrial applications. Ixana's mission is to enable always-on, low-latency edge AI and high-speed human-computer interfaces by breaking the energy-latency trade-off through confined E-field coupling.

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