Jobs at Ceva, Inc.

Execute the full formal verification cycle for DSP, AI processor, and hardware accelerator ASIC designs. Develop formal testbenches and SystemVerilog Assertions, define verification strategies and plans, collaborate with design and verification teams, track coverage and progress, and support verification completeness and final sign-off using industry-standard formal tools.

Develop and maintain embedded software for 5G modem systems, including hardware-block drivers. Analyze, debug, optimize, and verify code and test results, investigate complex hardware/software failures, improve performance and code size, integrate modules, and manage comprehensive test plans. The role also involves using AI tools to accelerate development and debugging.

Develop and maintain automation scripts for front-end emulation and VLSI CAD flows. Support VLSI artifact execution and releases, improve infrastructure efficiency and tool integration, and work with version control and CI/CD pipelines for regression and build environments. The role also involves establishing emulation methodologies and procedures. Candidates should be recent engineering graduates with Python, Linux or Unix shell scripting, and academic knowledge of VLSI, ASIC, and verification concepts.

Design, implement and optimize an NPU (Neural Network Processor) simulator in C/C++ (OOP), collaborating with architecture, algorithms, systems and hardware teams to enable efficient execution of advanced AI networks for edge devices. Analyze and improve simulator performance and accuracy across Ceva processor architectures.

Entry-level role supporting VLSI CAD and emulation infrastructure: develop automation scripts, maintain CAD/emulation flows, work with version control and CI/CD, collaborate with global teams, and improve tool integration.

Design and implement components of the AI Graph Compiler software for NPUs, optimizing performance under constraints and collaborating with architects and engineers.

The Digital Design Engineer will design and implement advanced Bluetooth solutions, manage project progress, and collaborate with cross-functional teams to ensure product performance and reliability.

The R&D Technical Project Manager will lead multidisciplinary engineering teams in developing Neural Network Processor products, ensuring project delivery from planning through mass production, while managing technical risks and stakeholder communication.

Design and develop Ceva's open-source toolchain and graph compiler for DSP and NPU targets. Drive graph compilation flows, code generation, and optimizations. Integrate AI coding agents, own complex components end-to-end, mentor engineers, and collaborate with hardware, algorithm, and software teams globally.

Design and implement Ceva's AI Graph Compiler software stack for NPUs, optimizing performance and collaborating on hardware-software co-design while mentoring junior engineers.

Define and optimize system and PHY architecture for advanced wireless modem products. Collaborate with algorithm, HW/SW, RF and validation teams through design, integration, testing, and customer support, with focus on low-power implementations and productization.

Maternity-leave HR role responsible for employee wellbeing, experience, internal communications, and employer branding. Plans and delivers events and engagement programs, manages vendors and budgets, produces internal content, coordinates global stakeholders, and supports cross-organizational projects to improve culture and belonging.

Lead architecture, design and verification of Bluetooth and 802.15.4 MAC/PHY and SoC subsystems. Implement digital designs on FPGA for prototyping, support validation and certification, mentor engineers, track project progress, produce subsystem documentation, and drive process and tooling improvements.

Lead development of full VLSI verification flows for DSP ASICs: define verification strategy, micro-architecture tests, test plans, functional coverage, and build SystemVerilog-UVM/Specman environments. Use formal verification and emulation, collaborate across teams, and present results to management.