Jobs at Ceva, Inc.

Owns end-to-end planning, coordination, and delivery of a complex NPU AI software stack spanning compilers, runtimes, SDKs, drivers, and firmware. The role synchronizes software, validation, and architecture teams; manages risks, dependencies, milestones, customer commitments, and release readiness; and establishes SDLC quality gates and post-mortem processes. Success requires technical software engineering depth, strong cross-functional leadership, and the ability to drive accountability across distributed teams without direct authority.

Develop and maintain embedded software for 5G modem systems, including hardware-block drivers. Analyze, debug, optimize, and verify code and test results, investigate complex hardware/software failures, improve performance and code size, integrate modules, and manage comprehensive test plans. The role also involves using AI tools to accelerate development and debugging.

Develop and maintain automation scripts for front-end emulation and VLSI CAD flows. Support VLSI artifact execution and releases, improve infrastructure efficiency and tool integration, and work with version control and CI/CD pipelines for regression and build environments. The role also involves establishing emulation methodologies and procedures. Candidates should be recent engineering graduates with Python, Linux or Unix shell scripting, and academic knowledge of VLSI, ASIC, and verification concepts.

Design, implement and optimize an NPU (Neural Network Processor) simulator in C/C++ (OOP), collaborating with architecture, algorithms, systems and hardware teams to enable efficient execution of advanced AI networks for edge devices. Analyze and improve simulator performance and accuracy across Ceva processor architectures.

Entry-level role supporting VLSI CAD and emulation infrastructure: develop automation scripts, maintain CAD/emulation flows, work with version control and CI/CD, collaborate with global teams, and improve tool integration.

Customer-facing engineering role supporting Ceva's NPU and DSP hardware and architecture across pre-sales evaluation through post-sales integration. Maintain deep product expertise, create training materials and application notes, provide technical advice and support, and collaborate with R&D, field engineers, partners, and customers.

Customer-facing engineering role supporting Ceva's NPUs and DSPs hardware and architecture across the customer lifecycle. Maintain deep product expertise, produce training and documentation, provide pre- and post-sales technical support, and collaborate with R&D, FAE, partners, and customers on integration and evaluation.

Design and implement components of the AI Graph Compiler software for NPUs, optimizing performance under constraints and collaborating with architects and engineers.

The Digital Design Engineer will design and implement advanced Bluetooth solutions, manage project progress, and collaborate with cross-functional teams to ensure product performance and reliability.

Lead the development of software architecture for advanced neural network AI tools, collaborating with hardware/software teams to enhance NPU efficiencies and guide product innovation.

The R&D Technical Project Manager will lead multidisciplinary engineering teams in developing Neural Network Processor products, ensuring project delivery from planning through mass production, while managing technical risks and stakeholder communication.

Develop embedded software components for Bluetooth products, including design, implementation, testing, and collaboration with teams.

Key contributor to AI Graph Compiler design for NPUs, optimizing performance under constraints, collaborating on HW-SW co-design, and mentoring junior engineers.

Define and drive connectivity subsystem architectures (Wi‑Fi, Bluetooth, UWB) for SoCs, lead customer technical engagement, support tape-out, silicon bring-up, productization, cross-functional integration, and ensure production readiness.

Design and develop Ceva's open-source toolchain and graph compiler for DSP and NPU targets. Drive graph compilation flows, code generation, and optimizations. Integrate AI coding agents, own complex components end-to-end, mentor engineers, and collaborate with hardware, algorithm, and software teams globally.

Design and implement Ceva's AI Graph Compiler software stack for NPUs, optimizing performance and collaborating on hardware-software co-design while mentoring junior engineers.

Define and optimize system and PHY architecture for advanced wireless modem products. Collaborate with algorithm, HW/SW, RF and validation teams through design, integration, testing, and customer support, with focus on low-power implementations and productization.

Maternity-leave HR role responsible for employee wellbeing, experience, internal communications, and employer branding. Plans and delivers events and engagement programs, manages vendors and budgets, produces internal content, coordinates global stakeholders, and supports cross-organizational projects to improve culture and belonging.

Administer and maintain Ceva's Salesforce CRM, support users, troubleshoot integrations (Azure DevOps, Blob Storage, Power Platform), design and implement CRM enhancements, deploy AI tools for Sales, and provide first-line Salesforce support across Sales, Legal, Finance, and Marketing.

Lead architecture, design and verification of Bluetooth and 802.15.4 MAC/PHY and SoC subsystems. Implement digital designs on FPGA for prototyping, support validation and certification, mentor engineers, track project progress, produce subsystem documentation, and drive process and tooling improvements.