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About the Business Unit:
The AI Division is a unique and dedicated group within Ceva, driving innovation in Machine Learning and Generative AI architectures for edge devices and cloud inference.
Our R&D domains span Neural Network Processors (NPU), Vision DSPs, and advanced AI algorithms for applications across smartphones, tablets, automotive, surveillance cameras and many more edge AI systems.
We combine cutting-edge hardware IP design with embedded software and system-level solutions, enabling the next generation of intelligent and energy-efficient devices.
About the Role:
In this role, you will join our Formal Verification team, executing full verification cycle from architectural definition and FV strategy definition to full execution and final sign-off, utilizing advanced Formal Verification methodologies and tools.
This role allows for independent work, impactful input, and substantial contributions to the VLSI department’s verification tasks
Responsibilities:
Develop Formal Test benches and Properties - Write and maintain System Verilog Assertions to formally verify RTL designs using industry-standard formal tools.
Collaborating with Design and Verification Teams.
Contribute to Verification Planning and Coverage.
Define formal verification plans, track progress, and contribute to achieving verification completeness.
Requirements- Bachelor’s degree in electrical engineering.
- 3-5 years of experience in verification position.
- Proficiency in System Verilog is essential.
- A proactive, self-driven individual with problem-solving and complex analysis capabilities.
- Capable of delivering results in a dynamic, agile environment, both independently and organization-wide
Advantages:
- Practical experience with Jasper is beneficial; familiarity with SV-UVM, Python, and Tcl is advantageous.
- Experience in Formal Verification or Dynamic Verification
Skills Required
- Bachelor's degree in electrical engineering from a leading university
- Proficiency in SystemVerilog
- Proactive, self-driven approach with problem-solving and complex analysis capabilities
- Ability to deliver results independently and organization-wide in a dynamic, agile environment
- Experience in formal verification or dynamic verification
- Practical experience with Jasper
- Familiarity with SV-UVM, Python, and Tcl
What We Do
Ceva powers the Smart Edge, bridging the digital and physical worlds to bring AI-driven products to life. Our Ceva AI fabric portfolio of silicon and software IP enables devices to Connect, Sense, and Infer – the essential capabilities for the intelligent edge. From 5G, cellular IoT, Bluetooth, Wi-Fi, and UWB connectivity to scalable Edge AI NPUs, AI DSPs, sensor fusion processors and embedded software, Ceva provides the foundational IP for devices that connect, understand their environment, and act in real time. With more than 20 billion devices shipped and trusted by 400+ customers worldwide, Ceva is the backbone of today’s most advanced smart edge products – from AI-infused wearables and IoT devices to autonomous vehicles and 5G infrastructure. Our differentiated solutions deliver seamless integration into existing design flows, total flexibility to combine solutions based on design needs and ultra–low–power performance in minimal silicon footprint, helping customers accelerate development, reduce risk, and bring innovative products to market faster. As technology evolves toward Physical AI, Ceva’s IP portfolio lays the foundation for systems that are always connected, contextually aware, and capable of intelligent, real-time decision-making.
