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About the Business Unit
Ceva is at the forefront of next-generation cellular communication systems. We build licensable 5G modem IP for User Equipment (UE) and base stations, from IoT-class devices to high-throughput infrastructure. Our platforms target the latest 5G-Advanced releases.
A fast-growing focus is space and satellite infrastructure: 5G satellite networks that bring standard cellular connectivity to LEO/GEO satellites and direct-to-device links. This domain brings unique challenges, including large Doppler shifts, long round-trip delays, radiation-aware design and tight power budgets.
About the Role
As a Senior VLSI Designer, you'll lead the full design flow of advanced DSP cores and baseband hardware accelerators, from architecture to timing closure. This hands-on role is central to developing the IPs behind our next-generation modem products. It comes with strong cross-functional collaboration (algorithms, architecture, verification, backend and customers) and real technical ownership.
What You’ll Do
Design and implement high-performance 5G baseband DSP cores and hardware accelerators for transmit and receive chains.Develop programmable DSP architectures for multi-antenna systems, including satellite connectivity.
Own the design flow from architecture and RTL development through verification support, synthesis, and timing closure.
ptimize power, performance, and area (PPA) in collaboration with backend and cross-functional teams.
Work closely with algorithm, verification, backend, and software teams, as well as customers, from specification to silicon bring-up.
Requirements- B.Sc./M.Sc. in Electrical Engineering
- 5–10 years of experience in VLSI design
- Proficiency in RTL design (Verilog/SystemVerilog), synthesis and timing analysis
- Familiarity with EDA tools (Synopsys, Cadence, Siemens EDA/Mentor)
- Strong understanding of digital design principles, SoC architecture and low-power techniques
- Excellent problem-solving and communication skills
Advantages
- Knowledge of signal processing and digital communication systems
- Experience with CDC/RDC analysis, DFT and multi-power-domain design
- Experience delivering licensable IP to external customers
Skills Required
- Bachelor’s or master’s degree in Electrical Engineering
- 5–10 years of experience in VLSI design
- Proficiency in RTL design using Verilog or SystemVerilog
- Experience with synthesis and timing analysis
- Familiarity with Synopsys, Cadence, or Siemens EDA/Mentor tools
- Strong understanding of digital design principles, SoC architecture, and low-power techniques
- Strong problem-solving and communication skills
- Knowledge of signal processing and digital communication systems
- Experience with CDC/RDC analysis, DFT, and multi-power-domain design
- Experience delivering licensable IP to external customers
What We Do
Ceva powers the Smart Edge, bridging the digital and physical worlds to bring AI-driven products to life. Our Ceva AI fabric portfolio of silicon and software IP enables devices to Connect, Sense, and Infer – the essential capabilities for the intelligent edge. From 5G, cellular IoT, Bluetooth, Wi-Fi, and UWB connectivity to scalable Edge AI NPUs, AI DSPs, sensor fusion processors and embedded software, Ceva provides the foundational IP for devices that connect, understand their environment, and act in real time. With more than 20 billion devices shipped and trusted by 400+ customers worldwide, Ceva is the backbone of today’s most advanced smart edge products – from AI-infused wearables and IoT devices to autonomous vehicles and 5G infrastructure. Our differentiated solutions deliver seamless integration into existing design flows, total flexibility to combine solutions based on design needs and ultra–low–power performance in minimal silicon footprint, helping customers accelerate development, reduce risk, and bring innovative products to market faster. As technology evolves toward Physical AI, Ceva’s IP portfolio lays the foundation for systems that are always connected, contextually aware, and capable of intelligent, real-time decision-making.
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