Top Hardware Engineer Jobs in Fayetteville, AR

Lead the development of hardware platforms, collaborate with cross-functional teams, ensure design compliance, and mentor junior engineers in hardware development.

The Principal Hardware Engineer will design high-speed digital hardware and maintain product integrity, managing designs from concept to production.

The Hardware Engineer - Applications assists in designing electrical controls hardware for material handling systems, prepares estimates and BOMs, and collaborates with various teams.

As a Senior Hardware Engineer, you'll drive DPU integration into server platforms, execute validation testing, and develop automation for data analysis while collaborating with cross-functional teams and vendors.

The Senior Engineer will develop AI-driven hardware models, assess SystemC simulation efficiency, and integrate modeling with EDA tools.

The Software Engineer will optimize support for new hardware architectures, write Mojo kernels, collaborate with hardware vendors, and improve portability infrastructure.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

The Sr. Hardware Design Engineer leads ASIC and FPGA projects, defining architecture, guiding RTL development, and mentoring junior engineers to deliver high-quality silicon solutions.

The Hardware Design Engineer will develop and verify digital designs using SystemVerilog, support hardware bring-up, and collaborate with teams.

The Senior Principal Hardware Systems Engineer leads architecture of high-performance compute platforms, focusing on PCIe design, GPU integration, and system-level development, while managing cross-functional teams and vendor collaboration.

As a System Engineer, you'll design, deploy, and maintain cloud systems for AI workloads, troubleshoot complex issues, and collaborate with teams to optimize performance.

Design and implement SystemVerilog RTL for high-speed ASIC compute, memory, and networking subsystems. Define microarchitecture, optimize Power/Performance/Area, collaborate with verification/physical teams, prototype features with architects/software, mentor junior engineers, and improve design flow using AI and automation.